UINT32\r
EFIAPI\r
UnitTestHostBaseLibAsmCpuid (\r
- IN UINT32 Index,\r
- OUT UINT32 *Eax OPTIONAL,\r
- OUT UINT32 *Ebx OPTIONAL,\r
- OUT UINT32 *Ecx OPTIONAL,\r
- OUT UINT32 *Edx OPTIONAL\r
+ IN UINT32 Index,\r
+ OUT UINT32 *Eax OPTIONAL,\r
+ OUT UINT32 *Ebx OPTIONAL,\r
+ OUT UINT32 *Ecx OPTIONAL,\r
+ OUT UINT32 *Edx OPTIONAL\r
)\r
{\r
if (Eax != NULL) {\r
*Eax = 0;\r
}\r
+\r
if (Ebx != NULL) {\r
*Ebx = 0;\r
}\r
+\r
if (Ecx != NULL) {\r
*Ecx = 0;\r
}\r
+\r
if (Edx != NULL) {\r
*Edx = 0;\r
}\r
+\r
return Index;\r
}\r
\r
UINT32\r
EFIAPI\r
UnitTestHostBaseLibAsmCpuidEx (\r
- IN UINT32 Index,\r
- IN UINT32 SubIndex,\r
- OUT UINT32 *Eax OPTIONAL,\r
- OUT UINT32 *Ebx OPTIONAL,\r
- OUT UINT32 *Ecx OPTIONAL,\r
- OUT UINT32 *Edx OPTIONAL\r
+ IN UINT32 Index,\r
+ IN UINT32 SubIndex,\r
+ OUT UINT32 *Eax OPTIONAL,\r
+ OUT UINT32 *Ebx OPTIONAL,\r
+ OUT UINT32 *Ecx OPTIONAL,\r
+ OUT UINT32 *Edx OPTIONAL\r
)\r
{\r
if (Eax != NULL) {\r
*Eax = 0;\r
}\r
+\r
if (Ebx != NULL) {\r
*Ebx = 0;\r
}\r
+\r
if (Ecx != NULL) {\r
*Ecx = 0;\r
}\r
+\r
if (Edx != NULL) {\r
*Edx = 0;\r
}\r
+\r
return Index;\r
}\r
\r
UINT64\r
EFIAPI\r
UnitTestHostBaseLibAsmReadMsr64 (\r
- IN UINT32 Index\r
+ IN UINT32 Index\r
)\r
{\r
if (Index < 0x1000) {\r
return mUnitTestHostBaseLibMsr[0][Index];\r
}\r
- if (Index >= 0xC0000000 && Index < 0xC0001000) {\r
+\r
+ if ((Index >= 0xC0000000) && (Index < 0xC0001000)) {\r
return mUnitTestHostBaseLibMsr[1][Index];\r
}\r
+\r
return 0;\r
}\r
\r
UINT64\r
EFIAPI\r
UnitTestHostBaseLibAsmWriteMsr64 (\r
- IN UINT32 Index,\r
- IN UINT64 Value\r
+ IN UINT32 Index,\r
+ IN UINT64 Value\r
)\r
{\r
if (Index < 0x1000) {\r
mUnitTestHostBaseLibMsr[0][Index] = Value;\r
}\r
- if (Index >= 0xC0000000 && Index < 0xC0001000) {\r
+\r
+ if ((Index >= 0xC0000000) && (Index < 0xC0001000)) {\r
mUnitTestHostBaseLibMsr[1][Index - 0xC00000000] = Value;\r
}\r
+\r
return Value;\r
}\r
\r
VOID\r
EFIAPI\r
UnitTestHostBaseLibAsmReadGdtr (\r
- OUT IA32_DESCRIPTOR *Gdtr\r
+ OUT IA32_DESCRIPTOR *Gdtr\r
)\r
{\r
Gdtr = &mUnitTestHostBaseLibGdtr;\r
VOID\r
EFIAPI\r
UnitTestHostBaseLibAsmWriteGdtr (\r
- IN CONST IA32_DESCRIPTOR *Gdtr\r
+ IN CONST IA32_DESCRIPTOR *Gdtr\r
)\r
{\r
CopyMem (&mUnitTestHostBaseLibGdtr, Gdtr, sizeof (IA32_DESCRIPTOR));\r
VOID\r
EFIAPI\r
UnitTestHostBaseLibAsmReadIdtr (\r
- OUT IA32_DESCRIPTOR *Idtr\r
+ OUT IA32_DESCRIPTOR *Idtr\r
)\r
{\r
Idtr = &mUnitTestHostBaseLibIdtr;\r
VOID\r
EFIAPI\r
UnitTestHostBaseLibAsmWriteIdtr (\r
- IN CONST IA32_DESCRIPTOR *Idtr\r
+ IN CONST IA32_DESCRIPTOR *Idtr\r
)\r
{\r
CopyMem (&mUnitTestHostBaseLibIdtr, Idtr, sizeof (IA32_DESCRIPTOR));\r
VOID\r
EFIAPI\r
UnitTestHostBaseLibAsmWriteLdtr (\r
- IN UINT16 Ldtr\r
+ IN UINT16 Ldtr\r
)\r
{\r
mUnitTestHostBaseLibSegment[UNIT_TEST_HOST_BASE_LIB_SEGMENT_LDTR] = Ldtr;\r
UINT64\r
EFIAPI\r
UnitTestHostBaseLibAsmReadPmc (\r
- IN UINT32 Index\r
+ IN UINT32 Index\r
)\r
{\r
return 0;\r
UINTN\r
EFIAPI\r
UnitTestHostBaseLibAsmMonitor (\r
- IN UINTN Eax,\r
- IN UINTN Ecx,\r
- IN UINTN Edx\r
+ IN UINTN Eax,\r
+ IN UINTN Ecx,\r
+ IN UINTN Edx\r
)\r
{\r
return Eax;\r
UINTN\r
EFIAPI\r
UnitTestHostBaseLibAsmMwait (\r
- IN UINTN Eax,\r
- IN UINTN Ecx\r
+ IN UINTN Eax,\r
+ IN UINTN Ecx\r
)\r
{\r
return Eax;\r
VOID *\r
EFIAPI\r
UnitTestHostBaseLibAsmFlushCacheLine (\r
- IN VOID *LinearAddress\r
+ IN VOID *LinearAddress\r
)\r
{\r
return LinearAddress;\r
VOID\r
EFIAPI\r
UnitTestHostBaseLibAsmEnablePaging64 (\r
- IN UINT16 Cs,\r
- IN UINT64 EntryPoint,\r
- IN UINT64 Context1 OPTIONAL,\r
- IN UINT64 Context2 OPTIONAL,\r
- IN UINT64 NewStack\r
+ IN UINT16 Cs,\r
+ IN UINT64 EntryPoint,\r
+ IN UINT64 Context1 OPTIONAL,\r
+ IN UINT64 Context2 OPTIONAL,\r
+ IN UINT64 NewStack\r
)\r
{\r
SWITCH_STACK_ENTRY_POINT NewEntryPoint;\r
VOID\r
EFIAPI\r
UnitTestHostBaseLibAsmDisablePaging64 (\r
- IN UINT16 Cs,\r
- IN UINT32 EntryPoint,\r
- IN UINT32 Context1 OPTIONAL,\r
- IN UINT32 Context2 OPTIONAL,\r
- IN UINT32 NewStack\r
+ IN UINT16 Cs,\r
+ IN UINT32 EntryPoint,\r
+ IN UINT32 Context1 OPTIONAL,\r
+ IN UINT32 Context2 OPTIONAL,\r
+ IN UINT32 NewStack\r
)\r
{\r
SWITCH_STACK_ENTRY_POINT NewEntryPoint;\r
VOID\r
EFIAPI\r
UnitTestHostBaseLibAsmGetThunk16Properties (\r
- OUT UINT32 *RealModeBufferSize,\r
- OUT UINT32 *ExtraStackSize\r
+ OUT UINT32 *RealModeBufferSize,\r
+ OUT UINT32 *ExtraStackSize\r
)\r
{\r
*RealModeBufferSize = 0;\r
VOID\r
EFIAPI\r
UnitTestHostBaseLibAsmPrepareThunk16 (\r
- IN OUT THUNK_CONTEXT *ThunkContext\r
+ IN OUT THUNK_CONTEXT *ThunkContext\r
)\r
{\r
}\r
VOID\r
EFIAPI\r
UnitTestHostBaseLibAsmThunk16 (\r
- IN OUT THUNK_CONTEXT *ThunkContext\r
+ IN OUT THUNK_CONTEXT *ThunkContext\r
)\r
{\r
}\r
VOID\r
EFIAPI\r
UnitTestHostBaseLibAsmPrepareAndThunk16 (\r
- IN OUT THUNK_CONTEXT *ThunkContext\r
+ IN OUT THUNK_CONTEXT *ThunkContext\r
)\r
{\r
}\r
VOID\r
EFIAPI\r
UnitTestHostBaseLibAsmWriteTr (\r
- IN UINT16 Selector\r
+ IN UINT16 Selector\r
)\r
{\r
mUnitTestHostBaseLibSegment[UNIT_TEST_HOST_BASE_LIB_SEGMENT_TR] = Selector;\r
VOID\r
EFIAPI\r
UnitTestHostBaseLibPatchInstructionX86 (\r
- OUT X86_ASSEMBLY_PATCH_LABEL *InstructionEnd,\r
- IN UINT64 PatchValue,\r
- IN UINTN ValueSize\r
+ OUT X86_ASSEMBLY_PATCH_LABEL *InstructionEnd,\r
+ IN UINT64 PatchValue,\r
+ IN UINTN ValueSize\r
)\r
{\r
}\r
UINT32\r
EFIAPI\r
AsmCpuid (\r
- IN UINT32 Index,\r
- OUT UINT32 *Eax OPTIONAL,\r
- OUT UINT32 *Ebx OPTIONAL,\r
- OUT UINT32 *Ecx OPTIONAL,\r
- OUT UINT32 *Edx OPTIONAL\r
+ IN UINT32 Index,\r
+ OUT UINT32 *Eax OPTIONAL,\r
+ OUT UINT32 *Ebx OPTIONAL,\r
+ OUT UINT32 *Ecx OPTIONAL,\r
+ OUT UINT32 *Edx OPTIONAL\r
)\r
{\r
return gUnitTestHostBaseLib.X86->AsmCpuid (Index, Eax, Ebx, Ecx, Edx);\r
UINT32\r
EFIAPI\r
AsmCpuidEx (\r
- IN UINT32 Index,\r
- IN UINT32 SubIndex,\r
- OUT UINT32 *Eax OPTIONAL,\r
- OUT UINT32 *Ebx OPTIONAL,\r
- OUT UINT32 *Ecx OPTIONAL,\r
- OUT UINT32 *Edx OPTIONAL\r
+ IN UINT32 Index,\r
+ IN UINT32 SubIndex,\r
+ OUT UINT32 *Eax OPTIONAL,\r
+ OUT UINT32 *Ebx OPTIONAL,\r
+ OUT UINT32 *Ecx OPTIONAL,\r
+ OUT UINT32 *Edx OPTIONAL\r
)\r
{\r
return gUnitTestHostBaseLib.X86->AsmCpuidEx (Index, SubIndex, Eax, Ebx, Ecx, Edx);\r
UINT64\r
EFIAPI\r
AsmReadMsr64 (\r
- IN UINT32 Index\r
+ IN UINT32 Index\r
)\r
{\r
return gUnitTestHostBaseLib.X86->AsmReadMsr64 (Index);\r
UINT64\r
EFIAPI\r
AsmWriteMsr64 (\r
- IN UINT32 Index,\r
- IN UINT64 Value\r
+ IN UINT32 Index,\r
+ IN UINT64 Value\r
)\r
{\r
return gUnitTestHostBaseLib.X86->AsmWriteMsr64 (Index, Value);\r
VOID\r
EFIAPI\r
AsmReadGdtr (\r
- OUT IA32_DESCRIPTOR *Gdtr\r
+ OUT IA32_DESCRIPTOR *Gdtr\r
)\r
{\r
gUnitTestHostBaseLib.X86->AsmReadGdtr (Gdtr);\r
VOID\r
EFIAPI\r
AsmWriteGdtr (\r
- IN CONST IA32_DESCRIPTOR *Gdtr\r
+ IN CONST IA32_DESCRIPTOR *Gdtr\r
)\r
{\r
gUnitTestHostBaseLib.X86->AsmWriteGdtr (Gdtr);\r
VOID\r
EFIAPI\r
AsmReadIdtr (\r
- OUT IA32_DESCRIPTOR *Idtr\r
+ OUT IA32_DESCRIPTOR *Idtr\r
)\r
{\r
gUnitTestHostBaseLib.X86->AsmReadIdtr (Idtr);\r
VOID\r
EFIAPI\r
AsmWriteIdtr (\r
- IN CONST IA32_DESCRIPTOR *Idtr\r
+ IN CONST IA32_DESCRIPTOR *Idtr\r
)\r
{\r
gUnitTestHostBaseLib.X86->AsmWriteIdtr (Idtr);\r
VOID\r
EFIAPI\r
AsmWriteLdtr (\r
- IN UINT16 Ldtr\r
+ IN UINT16 Ldtr\r
)\r
{\r
gUnitTestHostBaseLib.X86->AsmWriteLdtr (Ldtr);\r
UINT64\r
EFIAPI\r
AsmReadPmc (\r
- IN UINT32 Index\r
+ IN UINT32 Index\r
)\r
{\r
return gUnitTestHostBaseLib.X86->AsmReadPmc (Index);\r
UINTN\r
EFIAPI\r
AsmMonitor (\r
- IN UINTN Eax,\r
- IN UINTN Ecx,\r
- IN UINTN Edx\r
+ IN UINTN Eax,\r
+ IN UINTN Ecx,\r
+ IN UINTN Edx\r
)\r
{\r
return gUnitTestHostBaseLib.X86->AsmMonitor (Eax, Ecx, Edx);\r
UINTN\r
EFIAPI\r
AsmMwait (\r
- IN UINTN Eax,\r
- IN UINTN Ecx\r
+ IN UINTN Eax,\r
+ IN UINTN Ecx\r
)\r
{\r
return gUnitTestHostBaseLib.X86->AsmMwait (Eax, Ecx);\r
VOID *\r
EFIAPI\r
AsmFlushCacheLine (\r
- IN VOID *LinearAddress\r
+ IN VOID *LinearAddress\r
)\r
{\r
return gUnitTestHostBaseLib.X86->AsmFlushCacheLine (LinearAddress);\r
VOID\r
EFIAPI\r
AsmEnablePaging64 (\r
- IN UINT16 Cs,\r
- IN UINT64 EntryPoint,\r
- IN UINT64 Context1 OPTIONAL,\r
- IN UINT64 Context2 OPTIONAL,\r
- IN UINT64 NewStack\r
+ IN UINT16 Cs,\r
+ IN UINT64 EntryPoint,\r
+ IN UINT64 Context1 OPTIONAL,\r
+ IN UINT64 Context2 OPTIONAL,\r
+ IN UINT64 NewStack\r
)\r
{\r
gUnitTestHostBaseLib.X86->AsmEnablePaging64 (Cs, EntryPoint, Context1, Context2, NewStack);\r
VOID\r
EFIAPI\r
AsmDisablePaging64 (\r
- IN UINT16 Cs,\r
- IN UINT32 EntryPoint,\r
- IN UINT32 Context1 OPTIONAL,\r
- IN UINT32 Context2 OPTIONAL,\r
- IN UINT32 NewStack\r
+ IN UINT16 Cs,\r
+ IN UINT32 EntryPoint,\r
+ IN UINT32 Context1 OPTIONAL,\r
+ IN UINT32 Context2 OPTIONAL,\r
+ IN UINT32 NewStack\r
)\r
{\r
gUnitTestHostBaseLib.X86->AsmDisablePaging64 (Cs, EntryPoint, Context1, Context2, NewStack);\r
VOID\r
EFIAPI\r
AsmGetThunk16Properties (\r
- OUT UINT32 *RealModeBufferSize,\r
- OUT UINT32 *ExtraStackSize\r
+ OUT UINT32 *RealModeBufferSize,\r
+ OUT UINT32 *ExtraStackSize\r
)\r
{\r
gUnitTestHostBaseLib.X86->AsmGetThunk16Properties (RealModeBufferSize, ExtraStackSize);\r
VOID\r
EFIAPI\r
AsmPrepareThunk16 (\r
- IN OUT THUNK_CONTEXT *ThunkContext\r
+ IN OUT THUNK_CONTEXT *ThunkContext\r
)\r
{\r
gUnitTestHostBaseLib.X86->AsmPrepareThunk16 (ThunkContext);\r
VOID\r
EFIAPI\r
AsmThunk16 (\r
- IN OUT THUNK_CONTEXT *ThunkContext\r
+ IN OUT THUNK_CONTEXT *ThunkContext\r
)\r
{\r
gUnitTestHostBaseLib.X86->AsmThunk16 (ThunkContext);\r
VOID\r
EFIAPI\r
AsmPrepareAndThunk16 (\r
- IN OUT THUNK_CONTEXT *ThunkContext\r
+ IN OUT THUNK_CONTEXT *ThunkContext\r
)\r
{\r
gUnitTestHostBaseLib.X86->AsmPrepareAndThunk16 (ThunkContext);\r
VOID\r
EFIAPI\r
AsmWriteTr (\r
- IN UINT16 Selector\r
+ IN UINT16 Selector\r
)\r
{\r
gUnitTestHostBaseLib.X86->AsmWriteTr (Selector);\r
VOID\r
EFIAPI\r
PatchInstructionX86 (\r
- OUT X86_ASSEMBLY_PATCH_LABEL *InstructionEnd,\r
- IN UINT64 PatchValue,\r
- IN UINTN ValueSize\r
+ OUT X86_ASSEMBLY_PATCH_LABEL *InstructionEnd,\r
+ IN UINT64 PatchValue,\r
+ IN UINTN ValueSize\r
)\r
{\r
gUnitTestHostBaseLib.X86->PatchInstructionX86 (InstructionEnd, PatchValue, ValueSize);\r