Add ASSERT() for BitField operations to make sure the input value is valid.

[mirror_edk2.git] / MdePkg / Library / BasePciCf8Lib / PciCf8Lib.c

diff --git a/MdePkg/Library/BasePciCf8Lib/PciCf8Lib.c b/MdePkg/Library/BasePciCf8Lib/PciCf8Lib.c
index 7fe219da0968dad539e6b9710f33467254904e9f..828508b2ebca13cce70cd1b63e6f0db836c08f11 100644 (file)
--- a/MdePkg/Library/BasePciCf8Lib/PciCf8Lib.c
+++ b/MdePkg/Library/BasePciCf8Lib/PciCf8Lib.c
@@ -2,7 +2,7 @@
   PCI CF8 Library functions that use I/O ports 0xCF8 and 0xCFC to perform PCI Configuration cycles.\r
   Layers on top of an I/O Library instance.\r
 \r
-  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -114,9 +114,18 @@ PciCf8Read8 (
   IN      UINTN                     Address\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT8    Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoRead8 (PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3));\r
+  Result = IoRead8 (PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3));\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -143,12 +152,21 @@ PciCf8Write8 (
   IN      UINT8                     Value\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT8    Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoWrite8 (\r
-           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
-           Value\r
-           );\r
+  Result = IoWrite8 (\r
+             PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
+             Value\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -179,12 +197,21 @@ PciCf8Or8 (
   IN      UINT8                     OrData\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT8    Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoOr8 (\r
-           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
-           OrData\r
-           );\r
+  Result = IoOr8 (\r
+             PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
+             OrData\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -215,12 +242,21 @@ PciCf8And8 (
   IN      UINT8                     AndData\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT8    Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoAnd8 (\r
-           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
-           AndData\r
-           );\r
+  Result = IoAnd8 (\r
+             PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
+             AndData\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -254,13 +290,22 @@ PciCf8AndThenOr8 (
   IN      UINT8                     OrData\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT8    Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoAndThenOr8 (\r
-           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
-           AndData,\r
-           OrData\r
-           );\r
+  Result = IoAndThenOr8 (\r
+             PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
+             AndData,\r
+             OrData\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -293,13 +338,22 @@ PciCf8BitFieldRead8 (
   IN      UINTN                     EndBit\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT8    Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoBitFieldRead8 (\r
-           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
-           StartBit,\r
-           EndBit\r
-           );\r
+  Result = IoBitFieldRead8 (\r
+             PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
+             StartBit,\r
+             EndBit\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -315,6 +369,7 @@ PciCf8BitFieldRead8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -335,14 +390,23 @@ PciCf8BitFieldWrite8 (
   IN      UINT8                     Value\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT8    Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoBitFieldWrite8 (\r
-           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
-           StartBit,\r
-           EndBit,\r
-           Value\r
-           );\r
+  Result = IoBitFieldWrite8 (\r
+             PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
+             StartBit,\r
+             EndBit,\r
+             Value\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -361,6 +425,7 @@ PciCf8BitFieldWrite8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -381,14 +446,23 @@ PciCf8BitFieldOr8 (
   IN      UINT8                     OrData\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT8    Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoBitFieldOr8 (\r
-           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
-           StartBit,\r
-           EndBit,\r
-           OrData\r
-           );\r
+  Result = IoBitFieldOr8 (\r
+             PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
+             StartBit,\r
+             EndBit,\r
+             OrData\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -407,6 +481,7 @@ PciCf8BitFieldOr8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -427,14 +502,23 @@ PciCf8BitFieldAnd8 (
   IN      UINT8                     AndData\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT8    Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoBitFieldAnd8 (\r
-           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
-           StartBit,\r
-           EndBit,\r
-           AndData\r
-           );\r
+  Result = IoBitFieldAnd8 (\r
+             PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
+             StartBit,\r
+             EndBit,\r
+             AndData\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -455,6 +539,8 @@ PciCf8BitFieldAnd8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -477,15 +563,24 @@ PciCf8BitFieldAndThenOr8(
   IN      UINT8                     OrData\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT8    Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoBitFieldAndThenOr8 (\r
-           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
-           StartBit,\r
-           EndBit,\r
-           AndData,\r
-           OrData\r
-           );\r
+  Result = IoBitFieldAndThenOr8 (\r
+             PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
+             StartBit,\r
+             EndBit,\r
+             AndData,\r
+             OrData\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -511,9 +606,18 @@ PciCf8Read16 (
   IN      UINTN                     Address\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT16   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoRead16 (PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2));\r
+  Result = IoRead16 (PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2));\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -541,12 +645,21 @@ PciCf8Write16 (
   IN      UINT16                    Value\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT16   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoWrite16 (\r
-           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
-           Value\r
-           );\r
+  Result = IoWrite16 (\r
+             PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
+             Value\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -578,12 +691,21 @@ PciCf8Or16 (
   IN      UINT16                    OrData\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT16   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoOr16 (\r
-           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
-           OrData\r
-           );\r
+  Result = IoOr16 (\r
+             PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
+             OrData\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -615,12 +737,21 @@ PciCf8And16 (
   IN      UINT16                    AndData\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT16   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoAnd16 (\r
-           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
-           AndData\r
-           );\r
+  Result = IoAnd16 (\r
+             PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
+             AndData\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -655,13 +786,22 @@ PciCf8AndThenOr16 (
   IN      UINT16                    OrData\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT16   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoAndThenOr16 (\r
-           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
-           AndData,\r
-           OrData\r
-           );\r
+  Result = IoAndThenOr16 (\r
+             PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
+             AndData,\r
+             OrData\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -695,13 +835,22 @@ PciCf8BitFieldRead16 (
   IN      UINTN                     EndBit\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT16   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoBitFieldRead16 (\r
-           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
-           StartBit,\r
-           EndBit\r
-           );\r
+  Result = IoBitFieldRead16 (\r
+             PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
+             StartBit,\r
+             EndBit\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -718,6 +867,7 @@ PciCf8BitFieldRead16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -738,14 +888,23 @@ PciCf8BitFieldWrite16 (
   IN      UINT16                    Value\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT16   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoBitFieldWrite16 (\r
-           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
-           StartBit,\r
-           EndBit,\r
-           Value\r
-           );\r
+  Result = IoBitFieldWrite16 (\r
+             PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
+             StartBit,\r
+             EndBit,\r
+             Value\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -765,6 +924,7 @@ PciCf8BitFieldWrite16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -785,14 +945,23 @@ PciCf8BitFieldOr16 (
   IN      UINT16                    OrData\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT16   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoBitFieldOr16 (\r
-           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
-           StartBit,\r
-           EndBit,\r
-           OrData\r
-           );\r
+  Result = IoBitFieldOr16 (\r
+             PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
+             StartBit,\r
+             EndBit,\r
+             OrData\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -812,6 +981,7 @@ PciCf8BitFieldOr16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -832,14 +1002,23 @@ PciCf8BitFieldAnd16 (
   IN      UINT16                    AndData\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT16   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoBitFieldAnd16 (\r
-           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
-           StartBit,\r
-           EndBit,\r
-           AndData\r
-           );\r
+  Result = IoBitFieldAnd16 (\r
+             PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
+             StartBit,\r
+             EndBit,\r
+             AndData\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -861,6 +1040,8 @@ PciCf8BitFieldAnd16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -883,15 +1064,24 @@ PciCf8BitFieldAndThenOr16(
   IN      UINT16                    OrData\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT16   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoBitFieldAndThenOr16 (\r
-           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
-           StartBit,\r
-           EndBit,\r
-           AndData,\r
-           OrData\r
-           );\r
+  Result = IoBitFieldAndThenOr16 (\r
+             PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
+             StartBit,\r
+             EndBit,\r
+             AndData,\r
+             OrData\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -917,9 +1107,18 @@ PciCf8Read32 (
   IN      UINTN                     Address\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT32   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoRead32 (PCI_CONFIGURATION_DATA_PORT);\r
+  Result = IoRead32 (PCI_CONFIGURATION_DATA_PORT);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -947,12 +1146,21 @@ PciCf8Write32 (
   IN      UINT32                    Value\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT32   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoWrite32 (\r
-           PCI_CONFIGURATION_DATA_PORT,\r
-           Value\r
-           );\r
+  Result = IoWrite32 (\r
+             PCI_CONFIGURATION_DATA_PORT,\r
+             Value\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -984,12 +1192,21 @@ PciCf8Or32 (
   IN      UINT32                    OrData\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT32   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoOr32 (\r
-           PCI_CONFIGURATION_DATA_PORT,\r
-           OrData\r
-           );\r
+  Result = IoOr32 (\r
+             PCI_CONFIGURATION_DATA_PORT,\r
+             OrData\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -1021,12 +1238,21 @@ PciCf8And32 (
   IN      UINT32                    AndData\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT32   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoAnd32 (\r
-           PCI_CONFIGURATION_DATA_PORT,\r
-           AndData\r
-           );\r
+  Result = IoAnd32 (\r
+             PCI_CONFIGURATION_DATA_PORT,\r
+             AndData\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -1061,13 +1287,22 @@ PciCf8AndThenOr32 (
   IN      UINT32                    OrData\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT32   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoAndThenOr32 (\r
-           PCI_CONFIGURATION_DATA_PORT,\r
-           AndData,\r
-           OrData\r
-           );\r
+  Result = IoAndThenOr32 (\r
+             PCI_CONFIGURATION_DATA_PORT,\r
+             AndData,\r
+             OrData\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -1101,13 +1336,22 @@ PciCf8BitFieldRead32 (
   IN      UINTN                     EndBit\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT32   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoBitFieldRead32 (\r
-           PCI_CONFIGURATION_DATA_PORT,\r
-           StartBit,\r
-           EndBit\r
-           );\r
+  Result = IoBitFieldRead32 (\r
+             PCI_CONFIGURATION_DATA_PORT,\r
+             StartBit,\r
+             EndBit\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -1124,6 +1368,7 @@ PciCf8BitFieldRead32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -1144,14 +1389,23 @@ PciCf8BitFieldWrite32 (
   IN      UINT32                    Value\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT32   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoBitFieldWrite32 (\r
-           PCI_CONFIGURATION_DATA_PORT,\r
-           StartBit,\r
-           EndBit,\r
-           Value\r
-           );\r
+  Result = IoBitFieldWrite32 (\r
+             PCI_CONFIGURATION_DATA_PORT,\r
+             StartBit,\r
+             EndBit,\r
+             Value\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -1171,6 +1425,7 @@ PciCf8BitFieldWrite32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -1191,14 +1446,23 @@ PciCf8BitFieldOr32 (
   IN      UINT32                    OrData\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT32   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoBitFieldOr32 (\r
-           PCI_CONFIGURATION_DATA_PORT,\r
-           StartBit,\r
-           EndBit,\r
-           OrData\r
-           );\r
+  Result = IoBitFieldOr32 (\r
+             PCI_CONFIGURATION_DATA_PORT,\r
+             StartBit,\r
+             EndBit,\r
+             OrData\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -1218,6 +1482,7 @@ PciCf8BitFieldOr32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -1238,14 +1503,23 @@ PciCf8BitFieldAnd32 (
   IN      UINT32                    AndData\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT32   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoBitFieldAnd32 (\r
-           PCI_CONFIGURATION_DATA_PORT,\r
-           StartBit,\r
-           EndBit,\r
-           AndData\r
-           );\r
+  Result = IoBitFieldAnd32 (\r
+             PCI_CONFIGURATION_DATA_PORT,\r
+             StartBit,\r
+             EndBit,\r
+             AndData\r
+             );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r
@@ -1267,6 +1541,8 @@ PciCf8BitFieldAnd32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -1289,15 +1565,24 @@ PciCf8BitFieldAndThenOr32(
   IN      UINT32                    OrData\r
   )\r
 {\r
+  BOOLEAN  InterruptState;\r
+  UINT32   AddressPort;\r
+  UINT32   Result;\r
+  \r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  InterruptState = SaveAndDisableInterrupts ();\r
+  AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
   IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
-  return IoBitFieldAndThenOr32 (\r
-           PCI_CONFIGURATION_DATA_PORT,\r
-           StartBit,\r
-           EndBit,\r
-           AndData,\r
-           OrData\r
-           );\r
+  Result = IoBitFieldAndThenOr32 (\r
+               PCI_CONFIGURATION_DATA_PORT,\r
+               StartBit,\r
+               EndBit,\r
+               AndData,\r
+               OrData\r
+               );\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);\r
+  SetInterruptState (InterruptState);\r
+  return Result;\r
 }\r
 \r
 /**\r