MdePkg: Replace BSD License with BSD+Patent License

[mirror_edk2.git] / MdePkg / Library / BasePciCf8Lib / PciCf8Lib.c

diff --git a/MdePkg/Library/BasePciCf8Lib/PciCf8Lib.c b/MdePkg/Library/BasePciCf8Lib/PciCf8Lib.c
index 2cc77f1aaa42cc48e03fd5e7040d1603ea7558a3..ba4190ab686cb9235fb7a9616799586d2f9ee3ee 100644 (file)
--- a/MdePkg/Library/BasePciCf8Lib/PciCf8Lib.c
+++ b/MdePkg/Library/BasePciCf8Lib/PciCf8Lib.c
@@ -2,14 +2,8 @@
   PCI CF8 Library functions that use I/O ports 0xCF8 and 0xCFC to perform PCI Configuration cycles.\r
   Layers on top of an I/O Library instance.\r
 \r
-  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
-  This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php.\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
 \r
@@ -61,20 +55,20 @@
   ASSERT (((A) & (~0xffff0ff | (M))) == 0)\r
 \r
 /**\r
-  Registers a PCI device so PCI configuration registers may be accessed after \r
+  Registers a PCI device so PCI configuration registers may be accessed after\r
   SetVirtualAddressMap().\r
-  \r
-  Registers the PCI device specified by Address so all the PCI configuration registers \r
+\r
+  Registers the PCI device specified by Address so all the PCI configuration registers\r
   associated with that PCI device may be accessed after SetVirtualAddressMap() is called.\r
-  \r
+\r
   If Address > 0x0FFFFFFF, then ASSERT().\r
   If the register specified by Address >= 0x100, then ASSERT().\r
 \r
   @param  Address The address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
-  \r
+\r
   @retval RETURN_SUCCESS           The PCI device was registered for runtime access.\r
-  @retval RETURN_UNSUPPORTED       An attempt was made to call this function \r
+  @retval RETURN_UNSUPPORTED       An attempt was made to call this function\r
                                    after ExitBootServices().\r
   @retval RETURN_UNSUPPORTED       The resources required to access the PCI device\r
                                    at runtime could not be mapped.\r
@@ -117,7 +111,7 @@ PciCf8Read8 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT8    Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -155,7 +149,7 @@ PciCf8Write8 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT8    Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -200,7 +194,7 @@ PciCf8Or8 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT8    Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -245,7 +239,7 @@ PciCf8And8 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT8    Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -293,7 +287,7 @@ PciCf8AndThenOr8 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT8    Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -341,7 +335,7 @@ PciCf8BitFieldRead8 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT8    Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -369,6 +363,7 @@ PciCf8BitFieldRead8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -392,7 +387,7 @@ PciCf8BitFieldWrite8 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT8    Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -424,6 +419,7 @@ PciCf8BitFieldWrite8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -447,7 +443,7 @@ PciCf8BitFieldOr8 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT8    Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -479,6 +475,7 @@ PciCf8BitFieldOr8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -502,7 +499,7 @@ PciCf8BitFieldAnd8 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT8    Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -536,6 +533,8 @@ PciCf8BitFieldAnd8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -561,7 +560,7 @@ PciCf8BitFieldAndThenOr8(
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT8    Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -604,7 +603,7 @@ PciCf8Read16 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT16   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -643,7 +642,7 @@ PciCf8Write16 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT16   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -689,7 +688,7 @@ PciCf8Or16 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT16   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -735,7 +734,7 @@ PciCf8And16 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT16   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -784,7 +783,7 @@ PciCf8AndThenOr16 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT16   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -833,7 +832,7 @@ PciCf8BitFieldRead16 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT16   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -862,6 +861,7 @@ PciCf8BitFieldRead16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -885,7 +885,7 @@ PciCf8BitFieldWrite16 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT16   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -918,6 +918,7 @@ PciCf8BitFieldWrite16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -941,7 +942,7 @@ PciCf8BitFieldOr16 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT16   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -974,6 +975,7 @@ PciCf8BitFieldOr16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -997,7 +999,7 @@ PciCf8BitFieldAnd16 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT16   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -1032,6 +1034,8 @@ PciCf8BitFieldAnd16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -1057,7 +1061,7 @@ PciCf8BitFieldAndThenOr16(
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT16   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -1100,7 +1104,7 @@ PciCf8Read32 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT32   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -1139,7 +1143,7 @@ PciCf8Write32 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT32   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -1185,7 +1189,7 @@ PciCf8Or32 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT32   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -1231,7 +1235,7 @@ PciCf8And32 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT32   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -1280,7 +1284,7 @@ PciCf8AndThenOr32 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT32   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -1329,7 +1333,7 @@ PciCf8BitFieldRead32 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT32   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -1358,6 +1362,7 @@ PciCf8BitFieldRead32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -1381,7 +1386,7 @@ PciCf8BitFieldWrite32 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT32   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -1414,6 +1419,7 @@ PciCf8BitFieldWrite32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -1437,7 +1443,7 @@ PciCf8BitFieldOr32 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT32   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -1470,6 +1476,7 @@ PciCf8BitFieldOr32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -1493,7 +1500,7 @@ PciCf8BitFieldAnd32 (
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT32   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r
@@ -1528,6 +1535,8 @@ PciCf8BitFieldAnd32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -1553,7 +1562,7 @@ PciCf8BitFieldAndThenOr32(
   BOOLEAN  InterruptState;\r
   UINT32   AddressPort;\r
   UINT32   Result;\r
-  \r
+\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);\r