#include <Library/PciLib.h>\r
#include <Library/PciCf8Lib.h>\r
\r
+/**\r
+ Registers a PCI device so PCI configuration registers may be accessed after \r
+ SetVirtualAddressMap().\r
+ \r
+ Registers the PCI device specified by Address so all the PCI configuration registers \r
+ associated with that PCI device may be accessed after SetVirtualAddressMap() is called.\r
+ \r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ \r
+ @retval RETURN_SUCCESS The PCI device was registered for runtime access.\r
+ @retval RETURN_UNSUPPORTED An attempt was made to call this function \r
+ after ExitBootServices().\r
+ @retval RETURN_UNSUPPORTED The resources required to access the PCI device\r
+ at runtime could not be mapped.\r
+ @retval RETURN_OUT_OF_RESOURCES There are not enough resources available to\r
+ complete the registration.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+PciRegisterForRuntimeAccess (\r
+ IN UINTN Address\r
+ )\r
+{\r
+ return PciCf8RegisterForRuntimeAccess (Address);\r
+}\r
+\r
/**\r
Reads an 8-bit PCI configuration register.\r
\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+ Performs a bitwise OR of an 8-bit PCI configuration register with\r
an 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
- value, followed a bitwise inclusive OR with another 8-bit value.\r
+ value, followed a bitwise OR with another 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
serialized.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
that all PCI read and write operations are serialized.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+ Performs a bitwise OR of a 16-bit PCI configuration register with\r
a 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
are serialized.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
serialized.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
\r
/**\r
Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
- value, followed a bitwise inclusive OR with another 16-bit value.\r
+ value, followed a bitwise OR with another 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
read and write operations are serialized.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
returned.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
If StartBit is greater than 15, then ASSERT().\r
If EndBit is greater than 15, then ASSERT().\r
If EndBit is less than StartBit, then ASSERT().\r
16-bit register is returned.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
If StartBit is greater than 15, then ASSERT().\r
If EndBit is greater than 15, then ASSERT().\r
If EndBit is less than StartBit, then ASSERT().\r
writes the result back to the bit field in the 16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
are serialized. Extra left bits in OrData are stripped.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
If StartBit is greater than 15, then ASSERT().\r
If EndBit is greater than 15, then ASSERT().\r
If EndBit is less than StartBit, then ASSERT().\r
serialized. Extra left bits in AndData are stripped.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
If StartBit is greater than 15, then ASSERT().\r
If EndBit is greater than 15, then ASSERT().\r
If EndBit is less than StartBit, then ASSERT().\r
\r
/**\r
Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
OrData are stripped.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
If StartBit is greater than 15, then ASSERT().\r
If EndBit is greater than 15, then ASSERT().\r
If EndBit is less than StartBit, then ASSERT().\r
serialized.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
that all PCI read and write operations are serialized.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+ Performs a bitwise OR of a 32-bit PCI configuration register with\r
a 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
are serialized.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
serialized.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
\r
/**\r
Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
- value, followed a bitwise inclusive OR with another 32-bit value.\r
+ value, followed a bitwise OR with another 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
read and write operations are serialized.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
returned.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
If StartBit is greater than 31, then ASSERT().\r
If EndBit is greater than 31, then ASSERT().\r
If EndBit is less than StartBit, then ASSERT().\r
32-bit register is returned.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
If StartBit is greater than 31, then ASSERT().\r
If EndBit is greater than 31, then ASSERT().\r
If EndBit is less than StartBit, then ASSERT().\r
writes the result back to the bit field in the 32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
are serialized. Extra left bits in OrData are stripped.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
If StartBit is greater than 31, then ASSERT().\r
If EndBit is greater than 31, then ASSERT().\r
If EndBit is less than StartBit, then ASSERT().\r
serialized. Extra left bits in AndData are stripped.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
If StartBit is greater than 31, then ASSERT().\r
If EndBit is greater than 31, then ASSERT().\r
If EndBit is less than StartBit, then ASSERT().\r
\r
/**\r
Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
OrData are stripped.\r
\r
If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
If StartBit is greater than 31, then ASSERT().\r
If EndBit is greater than 31, then ASSERT().\r
If EndBit is less than StartBit, then ASSERT().\r
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