\r
#define SMBUS_LIB_SLAVE_ADDRESS(SmBusAddress) (((SmBusAddress) >> 1) & 0x7f)\r
#define SMBUS_LIB_COMMAND(SmBusAddress) (((SmBusAddress) >> 8) & 0xff)\r
-#define SMBUS_LIB_LENGTH(SmBusAddress) (((SmBusAddress) >> 16) & 0x1f)\r
+#define SMBUS_LIB_LENGTH(SmBusAddress) (((SmBusAddress) >> 16) & 0x3f)\r
#define SMBUS_LIB_PEC(SmBusAddress) ((BOOLEAN) (((SmBusAddress) & SMBUS_LIB_PEC_BIT) != 0))\r
-#define SMBUS_LIB_RESEARVED(SmBusAddress) ((SmBusAddress) & ~(((1 << 21) - 2) | SMBUS_LIB_PEC_BIT))\r
+#define SMBUS_LIB_RESEARVED(SmBusAddress) ((SmBusAddress) & ~(((1 << 22) - 2) | SMBUS_LIB_PEC_BIT))\r
\r
//\r
// Replaced by PCD\r
//\r
-#define ICH_SMBUS_BASE_ADDRESS 0xEFA0\r
+#define ICH_SMBUS_IO_BASE_ADDRESS 0xEFA0\r
\r
/**\r
- Reads an 8-bit SMBUS register on ICH.\r
+ Reads an 8-bit register on ICH SMBUS controller.\r
\r
This internal function reads an SMBUS register specified by Offset.\r
\r
IN UINTN Offset\r
)\r
{\r
- return IoRead8 (ICH_SMBUS_BASE_ADDRESS + Offset);\r
+ return IoRead8 (ICH_SMBUS_IO_BASE_ADDRESS + Offset);\r
}\r
\r
/**\r
- Writes an 8-bit SMBUS register on ICH.\r
+ Writes an 8-bit register on ICH SMBUS controller.\r
\r
This internal function writes an SMBUS register specified by Offset.\r
\r
IN UINT8 Value\r
)\r
{\r
- return IoWrite8 (ICH_SMBUS_BASE_ADDRESS + Offset, Value);\r
+ return IoWrite8 (ICH_SMBUS_IO_BASE_ADDRESS + Offset, Value);\r
}\r
\r
/**\r
return RETURN_TIMEOUT;\r
} else if ((HostStatus & SMBUS_B_HOST_BUSY) != 0) {\r
//\r
- // Clear Status Register and exit\r
+ // Clear host status register and exit.\r
//\r
InternalSmBusIoWrite8 (SMBUS_R_HST_STS, SMBUS_B_HSTS_ALL);\r
return RETURN_TIMEOUT;\r
}\r
//\r
- // Clear byte pointer of 32-byte buffer.\r
- //\r
- InternalSmBusIoRead8 (SMBUS_R_HST_CTL);\r
+ // Clear out any odd status information (Will Not Clear In Use).\r
//\r
- // Clear BYTE_DONE status\r
- //\r
- InternalSmBusIoWrite8 (SMBUS_R_HST_STS, SMBUS_B_BYTE_DONE_STS);\r
+ InternalSmBusIoWrite8 (SMBUS_R_HST_STS, HostStatus);\r
\r
return RETURN_SUCCESS;\r
}\r
\r
/**\r
- Waits until the completion of SMBUS transaction.\r
+ Starts the SMBUS transaction and waits until the end.\r
\r
- This internal function waits until the transaction of SMBUS is over\r
- by polling the INTR bit of Host status register.\r
+ This internal function start the SMBUS transaction and waits until the transaction\r
+ of SMBUS is over by polling the INTR bit of Host status register.\r
If the SMBUS is not available, RETURN_TIMEOUT is returned;\r
Otherwise, it performs some basic initializations and returns\r
- RETURN_SUCCESS. \r
+ RETURN_SUCCESS.\r
+ \r
+ @param HostControl The Host control command to start SMBUS transaction.\r
\r
@retval RETURN_SUCCESS The SMBUS command was executed successfully.\r
@retval RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).\r
\r
**/\r
RETURN_STATUS\r
-InternalSmBusWait (\r
- VOID \r
+InternalSmBusStart (\r
+ IN UINT8 HostControl\r
)\r
{\r
UINT8 HostStatus;\r
UINT8 AuxiliaryStatus;\r
- BOOLEAN First;\r
- First = TRUE;\r
+\r
+ //\r
+ // Set Host Control Register (Initiate Operation, Interrupt disabled).\r
+ //\r
+ InternalSmBusIoWrite8 (SMBUS_R_HST_CTL, HostControl + SMBUS_B_START);\r
\r
do {\r
//\r
- // Poll INTR bit of host status register.\r
+ // Poll INTR bit of Host Status Register.\r
//\r
HostStatus = InternalSmBusIoRead8 (SMBUS_R_HST_STS);\r
} while ((HostStatus & (SMBUS_B_INTR | SMBUS_B_ERROR | SMBUS_B_BYTE_DONE_STS)) == 0);\r
return RETURN_SUCCESS;\r
}\r
//\r
- // Clear error bits of host status register\r
+ // Clear error bits of Host Status Register.\r
//\r
InternalSmBusIoWrite8 (SMBUS_R_HST_STS, SMBUS_B_ERROR);\r
//\r
- // Read auxiliary status register to judge CRC error.\r
+ // Read Auxiliary Status Register to judge CRC error.\r
//\r
AuxiliaryStatus = InternalSmBusIoRead8 (SMBUS_R_AUX_STS);\r
if ((AuxiliaryStatus & SMBUS_B_CRCE) != 0) {\r
}\r
\r
/**\r
- Executes an SMBUS quick read/write command.\r
+ Executes an SMBUS quick, byte or word command.\r
\r
- This internal function executes an SMBUS quick read/write command\r
- on the SMBUS device specified by SmBusAddress.\r
- Only the SMBUS slave address field of SmBusAddress is required.\r
+ This internal function executes an SMBUS quick, byte or word commond.\r
If Status is not NULL, then the status of the executed command is returned in Status.\r
\r
+ @param HostControl The value of Host Control Register to set. \r
@param SmBusAddress Address that encodes the SMBUS Slave Address,\r
SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Value The byte/word write to the SMBUS.\r
@param Status Return status for the executed command.\r
This is an optional parameter and may be NULL.\r
\r
+ @return The byte/word read from the SMBUS.\r
+\r
**/\r
-VOID\r
-EFIAPI\r
-InternalSmBusQuick (\r
+UINT16\r
+InternalSmBusNonBlock (\r
+ IN UINT8 HostControl,\r
IN UINTN SmBusAddress,\r
- OUT RETURN_STATUS *Status OPTIONAL\r
+ IN UINT16 Value,\r
+ OUT RETURN_STATUS *Status\r
)\r
{\r
- RETURN_STATUS ReturnStatus;\r
+ RETURN_STATUS ReturnStatus;\r
+ UINT8 AuxiliaryControl;\r
\r
+ //\r
+ // Try to acquire the ownership of ICH SMBUS.\r
+ //\r
ReturnStatus = InternalSmBusAcquire ();\r
if (RETURN_ERROR (ReturnStatus)) {\r
goto Done;\r
}\r
- \r
//\r
- // Set Command register\r
+ // Set the appropriate Host Control Register and auxiliary Control Register.\r
//\r
- InternalSmBusIoWrite8 (SMBUS_R_HST_CMD, 0);\r
+ AuxiliaryControl = 0;\r
+ if (SMBUS_LIB_PEC (SmBusAddress)) {\r
+ AuxiliaryControl |= SMBUS_B_AAC;\r
+ HostControl |= SMBUS_B_PEC_EN;\r
+ }\r
//\r
- // Set Auxiliary Control register\r
+ // Set Host Commond Register.\r
+ //\r
+ InternalSmBusIoWrite8 (SMBUS_R_HST_CMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));\r
//\r
- InternalSmBusIoWrite8 (SMBUS_R_AUX_CTL, 0);\r
+ // Write value to Host Data 0 and Host Data 1 Registers.\r
//\r
- // Set SMBus slave address for the device to send/receive from\r
+ InternalSmBusIoWrite8 (SMBUS_R_HST_D0, (UINT8) Value);\r
+ InternalSmBusIoWrite8 (SMBUS_R_HST_D1, (UINT8) (Value >> 8));\r
+ //\r
+ // Set Auxiliary Control Regiester.\r
+ //\r
+ InternalSmBusIoWrite8 (SMBUS_R_AUX_CTL, AuxiliaryControl);\r
+ //\r
+ // Set SMBUS slave address for the device to send/receive from.\r
//\r
InternalSmBusIoWrite8 (SMBUS_R_XMIT_SLVA, (UINT8) SmBusAddress);\r
//\r
- // Set Control Register (Initiate Operation, Interrupt disabled)\r
+ // Start the SMBUS transaction and wait for the end.\r
//\r
- InternalSmBusIoWrite8 (SMBUS_R_HST_CTL, SMBUS_V_SMB_CMD_QUICK + SMBUS_B_START);\r
-\r
+ ReturnStatus = InternalSmBusStart (HostControl);\r
//\r
- // Wait for the end\r
+ // Read value from Host Data 0 and Host Data 1 Registers.\r
//\r
- ReturnStatus = InternalSmBusWait ();\r
-\r
+ Value = InternalSmBusIoRead8 (SMBUS_R_HST_D1) << 8;\r
+ Value |= InternalSmBusIoRead8 (SMBUS_R_HST_D0);\r
//\r
- // Clear status register and exit\r
+ // Clear Host Status Register and Auxiliary Status Register.\r
//\r
- InternalSmBusIoWrite8 (SMBUS_R_HST_STS, SMBUS_B_HSTS_ALL);;\r
+ InternalSmBusIoWrite8 (SMBUS_R_HST_STS, SMBUS_B_HSTS_ALL);\r
+ InternalSmBusIoWrite8 (SMBUS_R_AUX_STS, SMBUS_B_CRCE);\r
\r
Done:\r
if (Status != NULL) {\r
*Status = ReturnStatus;\r
}\r
+\r
+ return Value;\r
}\r
\r
/**\r
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);\r
\r
- InternalSmBusQuick (SmBusAddress | SMBUS_B_READ, Status);\r
+ InternalSmBusNonBlock (\r
+ SMBUS_V_SMB_CMD_QUICK,\r
+ SmBusAddress | SMBUS_B_READ,\r
+ 0,\r
+ Status\r
+ );\r
}\r
\r
/**\r
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);\r
\r
- InternalSmBusQuick (SmBusAddress | SMBUS_B_WRITE, Status);\r
-}\r
-\r
-/**\r
- Executes an SMBUS byte or word command.\r
-\r
- This internal function executes an .\r
- Only the SMBUS slave address field of SmBusAddress is required.\r
- If Status is not NULL, then the status of the executed command is returned in Status.\r
-\r
- @param HostControl The value of Host Control Register to set. \r
- @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
- SMBUS Command, SMBUS Data Length, and PEC.\r
- @param Value The byte/word write to the SMBUS.\r
- @param Status Return status for the executed command.\r
- This is an optional parameter and may be NULL.\r
-\r
- @return The byte/word read from the SMBUS.\r
-\r
-**/\r
-UINT16\r
-InternalSmBusByteWord (\r
- IN UINT8 HostControl,\r
- IN UINTN SmBusAddress,\r
- IN UINT16 Value,\r
- OUT RETURN_STATUS *Status\r
- )\r
-{\r
- RETURN_STATUS ReturnStatus;\r
- UINT8 AuxiliaryControl;\r
-\r
- ReturnStatus = InternalSmBusAcquire ();\r
- if (RETURN_ERROR (ReturnStatus)) {\r
- goto Done;\r
- }\r
-\r
- AuxiliaryControl = 0;\r
- if (SMBUS_LIB_PEC (SmBusAddress)) {\r
- AuxiliaryControl |= SMBUS_B_AAC;\r
- HostControl |= SMBUS_B_PEC_EN;\r
- }\r
- \r
- //\r
- // Set commond register\r
- //\r
- InternalSmBusIoWrite8 (SMBUS_R_HST_CMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));\r
-\r
- InternalSmBusIoWrite8 (SMBUS_R_HST_D0, (UINT8) Value);\r
- InternalSmBusIoWrite8 (SMBUS_R_HST_D1, (UINT8) (Value >> 8));\r
-\r
- //\r
- // Set Auxiliary Control Regiester.\r
- //\r
- InternalSmBusIoWrite8 (SMBUS_R_AUX_CTL, AuxiliaryControl);\r
- //\r
- // Set SMBus slave address for the device to send/receive from.\r
- //\r
- InternalSmBusIoWrite8 (SMBUS_R_XMIT_SLVA, (UINT8) SmBusAddress);\r
- //\r
- // Set Control Register (Initiate Operation, Interrupt disabled)\r
- //\r
- InternalSmBusIoWrite8 (SMBUS_R_HST_CTL, HostControl + SMBUS_B_START);\r
-\r
- //\r
- // Wait for the end\r
- //\r
- ReturnStatus = InternalSmBusWait ();\r
- \r
- Value = InternalSmBusIoRead8 (SMBUS_R_HST_D1) << 8;\r
- Value |= InternalSmBusIoRead8 (SMBUS_R_HST_D0);\r
-\r
- //\r
- // Clear status register and exit\r
- //\r
- InternalSmBusIoWrite8 (SMBUS_R_HST_STS, SMBUS_B_HSTS_ALL);;\r
-\r
-Done:\r
- if (Status != NULL) {\r
- *Status = ReturnStatus;\r
- }\r
-\r
- return Value;\r
+ InternalSmBusNonBlock (\r
+ SMBUS_V_SMB_CMD_QUICK,\r
+ SmBusAddress | SMBUS_B_WRITE,\r
+ 0,\r
+ Status\r
+ );\r
}\r
\r
/**\r
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);\r
\r
- return (UINT8) InternalSmBusByteWord (\r
+ return (UINT8) InternalSmBusNonBlock (\r
SMBUS_V_SMB_CMD_BYTE,\r
SmBusAddress | SMBUS_B_READ,\r
0,\r
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);\r
\r
- return (UINT8) InternalSmBusByteWord (\r
+ return (UINT8) InternalSmBusNonBlock (\r
SMBUS_V_SMB_CMD_BYTE,\r
SmBusAddress | SMBUS_B_WRITE,\r
Value,\r
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);\r
\r
- return (UINT8) InternalSmBusByteWord (\r
+ return (UINT8) InternalSmBusNonBlock (\r
SMBUS_V_SMB_CMD_BYTE_DATA,\r
SmBusAddress | SMBUS_B_READ,\r
0,\r
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);\r
\r
- return (UINT8) InternalSmBusByteWord (\r
+ return (UINT8) InternalSmBusNonBlock (\r
SMBUS_V_SMB_CMD_BYTE_DATA,\r
SmBusAddress | SMBUS_B_WRITE,\r
Value,\r
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);\r
\r
- return InternalSmBusByteWord (\r
+ return InternalSmBusNonBlock (\r
SMBUS_V_SMB_CMD_WORD_DATA,\r
SmBusAddress | SMBUS_B_READ,\r
0,\r
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);\r
\r
- return InternalSmBusByteWord (\r
+ return InternalSmBusNonBlock (\r
SMBUS_V_SMB_CMD_WORD_DATA,\r
SmBusAddress | SMBUS_B_WRITE,\r
Value,\r
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);\r
\r
- return InternalSmBusByteWord (\r
+ return InternalSmBusNonBlock (\r
SMBUS_V_SMB_CMD_PROCESS_CALL,\r
SmBusAddress | SMBUS_B_WRITE,\r
Value,\r
Bytes are read from the SMBUS and stored in Buffer.\r
The number of bytes read is returned, and will never return a value larger than 32-bytes.\r
If Status is not NULL, then the status of the executed command is returned in Status.\r
- It is the caller¡¯s responsibility to make sure Buffer is large enough for the total number of bytes read.\r
+ It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.\r
SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r
\r
@param HostControl The value of Host Control Register to set. \r
@param SmBusAddress Address that encodes the SMBUS Slave Address,\r
SMBUS Command, SMBUS Data Length, and PEC.\r
- @param OutBuffer Pointer to the buffer of bytes to write to the SMBUS.\r
- @param InBuffer Pointer to the buffer of bytes to read from the SMBUS.\r
+ @param WriteBuffer Pointer to the buffer of bytes to write to the SMBUS.\r
+ @param ReadBuffer Pointer to the buffer of bytes to read from the SMBUS.\r
@param Status Return status for the executed command.\r
This is an optional parameter and may be NULL.\r
\r
InternalSmBusBlock (\r
IN UINT8 HostControl,\r
IN UINTN SmBusAddress,\r
- IN UINT8 *OutBuffer,\r
- OUT UINT8 *InBuffer,\r
+ IN UINT8 *WriteBuffer,\r
+ OUT UINT8 *ReadBuffer,\r
OUT RETURN_STATUS *Status\r
)\r
{\r
UINTN Index;\r
UINTN BytesCount;\r
UINT8 AuxiliaryControl;\r
-\r
- BytesCount = SMBUS_LIB_LENGTH (SmBusAddress) + 1;\r
-\r
+ \r
+ BytesCount = SMBUS_LIB_LENGTH (SmBusAddress);\r
+ //\r
+ // Try to acquire the ownership of ICH SMBUS.\r
+ //\r
ReturnStatus = InternalSmBusAcquire ();\r
if (RETURN_ERROR (ReturnStatus)) {\r
goto Done;\r
}\r
- \r
+ //\r
+ // Set the appropriate Host Control Register and auxiliary Control Register.\r
+ //\r
AuxiliaryControl = SMBUS_B_E32B;\r
if (SMBUS_LIB_PEC (SmBusAddress)) {\r
AuxiliaryControl |= SMBUS_B_AAC;\r
HostControl |= SMBUS_B_PEC_EN;\r
}\r
-\r
+ //\r
+ // Set Host Command Register.\r
+ //\r
InternalSmBusIoWrite8 (SMBUS_R_HST_CMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));\r
-\r
- InternalSmBusIoWrite8 (SMBUS_R_HST_D0, (UINT8) BytesCount);\r
-\r
- if (OutBuffer != NULL) {\r
- for (Index = 0; Index < BytesCount; Index++) {\r
- InternalSmBusIoWrite8 (SMBUS_R_HOST_BLOCK_DB, OutBuffer[Index]);\r
- }\r
- }\r
//\r
// Set Auxiliary Control Regiester.\r
//\r
InternalSmBusIoWrite8 (SMBUS_R_AUX_CTL, AuxiliaryControl);\r
//\r
- // Set SMBus slave address for the device to send/receive from\r
+ // Clear byte pointer of 32-byte buffer.\r
//\r
- InternalSmBusIoWrite8 (SMBUS_R_XMIT_SLVA, (UINT8) SmBusAddress);\r
+ InternalSmBusIoRead8 (SMBUS_R_HST_CTL);\r
+\r
+ if (WriteBuffer != NULL) {\r
+ //\r
+ // Write the number of block to Host Block Data Byte Register.\r
+ //\r
+ InternalSmBusIoWrite8 (SMBUS_R_HST_D0, (UINT8) BytesCount);\r
+ //\r
+ // Write data block to Host Block Data Register.\r
+ //\r
+ for (Index = 0; Index < BytesCount; Index++) {\r
+ InternalSmBusIoWrite8 (SMBUS_R_HOST_BLOCK_DB, WriteBuffer[Index]);\r
+ }\r
+ }\r
//\r
- // Set Control Register (Initiate Operation, Interrupt disabled)\r
+ // Set SMBUS slave address for the device to send/receive from.\r
//\r
- InternalSmBusIoWrite8 (SMBUS_R_HST_CTL, HostControl + SMBUS_B_START);\r
-\r
+ InternalSmBusIoWrite8 (SMBUS_R_XMIT_SLVA, (UINT8) SmBusAddress);\r
//\r
- // Wait for the end\r
+ // Start the SMBUS transaction and wait for the end.\r
//\r
- ReturnStatus = InternalSmBusWait ();\r
+ ReturnStatus = InternalSmBusStart (HostControl);\r
if (RETURN_ERROR (ReturnStatus)) {\r
goto Done;\r
}\r
\r
- BytesCount = InternalSmBusIoRead8 (SMBUS_R_HST_D0);\r
- if (InBuffer != NULL) {\r
+ if (ReadBuffer != NULL) {\r
+ //\r
+ // Read the number of block from host block data byte register.\r
+ //\r
+ BytesCount = InternalSmBusIoRead8 (SMBUS_R_HST_D0);\r
+ //\r
+ // Write data block from Host Block Data Register.\r
+ //\r
for (Index = 0; Index < BytesCount; Index++) {\r
- InBuffer[Index] = InternalSmBusIoRead8 (SMBUS_R_HOST_BLOCK_DB);\r
+ ReadBuffer[Index] = InternalSmBusIoRead8 (SMBUS_R_HOST_BLOCK_DB);\r
}\r
}\r
-\r
//\r
- // Clear status register and exit\r
+ // Clear Host Status Register and Auxiliary Status Register.\r
//\r
InternalSmBusIoWrite8 (SMBUS_R_HST_STS, SMBUS_B_HSTS_ALL);\r
+ InternalSmBusIoWrite8 (SMBUS_R_AUX_STS, SMBUS_B_CRCE);\r
\r
Done:\r
if (Status != NULL) {\r
Bytes are read from the SMBUS and stored in Buffer.\r
The number of bytes read is returned, and will never return a value larger than 32-bytes.\r
If Status is not NULL, then the status of the executed command is returned in Status.\r
- It is the caller¡¯s responsibility to make sure Buffer is large enough for the total number of bytes read.\r
+ It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.\r
SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r
If Length in SmBusAddress is not zero, then ASSERT().\r
If Buffer is NULL, then ASSERT().\r
)\r
{\r
ASSERT (Buffer != NULL);\r
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);\r
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);\r
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);\r
\r
return InternalSmBusBlock (\r
\r
Executes an SMBUS block process call command on the SMBUS device specified by SmBusAddress.\r
The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r
- Bytes are written to the SMBUS from OutBuffer. Bytes are then read from the SMBUS into InBuffer.\r
+ Bytes are written to the SMBUS from WriteBuffer. Bytes are then read from the SMBUS into ReadBuffer.\r
If Status is not NULL, then the status of the executed command is returned in Status.\r
- It is the caller¡¯s responsibility to make sure InBuffer is large enough for the total number of bytes read.\r
+ It is the caller's responsibility to make sure ReadBuffer is large enough for the total number of bytes read.\r
SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r
- If OutBuffer is NULL, then ASSERT().\r
- If InBuffer is NULL, then ASSERT().\r
+ If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r
+ If WriteBuffer is NULL, then ASSERT().\r
+ If ReadBuffer is NULL, then ASSERT().\r
If any reserved bits of SmBusAddress are set, then ASSERT().\r
\r
@param SmBusAddress Address that encodes the SMBUS Slave Address,\r
SMBUS Command, SMBUS Data Length, and PEC.\r
- @param OutBuffer Pointer to the buffer of bytes to write to the SMBUS.\r
- @param InBuffer Pointer to the buffer of bytes to read from the SMBUS.\r
+ @param WriteBuffer Pointer to the buffer of bytes to write to the SMBUS.\r
+ @param ReadBuffer Pointer to the buffer of bytes to read from the SMBUS.\r
@param Status Return status for the executed command.\r
This is an optional parameter and may be NULL.\r
\r
EFIAPI\r
SmBusBlockProcessCall (\r
IN UINTN SmBusAddress,\r
- IN VOID *OutBuffer,\r
- OUT VOID *InBuffer,\r
+ IN VOID *WriteBuffer,\r
+ OUT VOID *ReadBuffer,\r
OUT RETURN_STATUS *Status OPTIONAL\r
)\r
{\r
- ASSERT (InBuffer != NULL);\r
- ASSERT (OutBuffer != NULL);\r
+ ASSERT (WriteBuffer != NULL);\r
+ ASSERT (ReadBuffer != NULL);\r
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);\r
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);\r
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);\r
\r
return InternalSmBusBlock (\r
SMBUS_V_SMB_CMD_BLOCK_PROCESS,\r
SmBusAddress | SMBUS_B_WRITE,\r
- OutBuffer,\r
- InBuffer,\r
+ WriteBuffer,\r
+ ReadBuffer,\r
Status\r
);\r
}\r
projects / mirror_edk2.git / blobdiff