// In processors based on Intel NetBurst microarchitecture, use two cache lines\r
//\r
ModelId = ModelId | ((RegEax >> 12) & 0xf0);\r
- if (ModelId <= 0x04 || ModelId == 0x06) {\r
+ if ((ModelId <= 0x04) || (ModelId == 0x06)) {\r
CacheLineSize *= 2;\r
}\r
}\r
\r
return CacheLineSize;\r
}\r
-\r