\r
**/\r
\r
-static EFI_CPU_IO_PROTOCOL *gCpuIo;\r
+//\r
+// Globle varible to cache pointer to CpuIo protocol.\r
+//\r
+STATIC EFI_CPU_IO_PROTOCOL *mCpuIo = NULL;\r
\r
+/**\r
+ The constructor function caches the pointer to CpuIo protocol.\r
+ \r
+ The constructor function locates CpuIo protocol from protocol database.\r
+ It will ASSERT() if that operation fails and it will always return EFI_SUCCESS. \r
+\r
+ @param ImageHandle The firmware allocated handle for the EFI image.\r
+ @param SystemTable A pointer to the EFI System Table.\r
+ \r
+ @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.\r
+\r
+**/\r
EFI_STATUS\r
IoLibConstructor (\r
IN EFI_HANDLE ImageHandle,\r
{\r
EFI_STATUS Status;\r
\r
- Status = SystemTable->BootServices->LocateProtocol (\r
- &gEfiCpuIoProtocolGuid,\r
- NULL,\r
- (VOID**)&gCpuIo\r
- );\r
+ Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID**) &mCpuIo);\r
ASSERT_EFI_ERROR (Status);\r
+\r
return Status;\r
}\r
\r
+/**\r
+ Reads registers in the EFI CPU I/O space.\r
+\r
+ Reads the I/O port specified by Port with registers width specified by Width.\r
+ The read value is returned. If such operations are not supported, then ASSERT().\r
+ This function must guarantee that all I/O read and write operations are serialized.\r
+\r
+ @param Port The base address of the I/O operation.\r
+ The caller is responsible for aligning the Address if required. \r
+ @param Width The width of the I/O operation.\r
+ \r
+ @return Data read from registers in the EFI CPU I/O space.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
IoReadWorker (\r
IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r
)\r
{\r
+ EFI_STATUS Status;\r
UINT64 Data;\r
\r
- gCpuIo->Io.Read (gCpuIo, Width, Port, 1, &Data);\r
+ Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
return Data;\r
}\r
\r
+/**\r
+ Writes registers in the EFI CPU I/O space.\r
+\r
+ Writes the I/O port specified by Port with registers width and value specified by Width\r
+ and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r
+ This function must guarantee that all I/O read and write operations are serialized.\r
+\r
+ @param Port The base address of the I/O operation.\r
+ The caller is responsible for aligning the Address if required. \r
+ @param Width The width of the I/O operation.\r
+ @param Data The value to write to the I/O port.\r
+ \r
+ @return The paramter of Data.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
IoWriteWorker (\r
IN UINT64 Data\r
)\r
{\r
- gCpuIo->Io.Write (gCpuIo, Width, Port, 1, &Data);\r
+ EFI_STATUS Status;\r
+\r
+ Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
return Data;\r
}\r
\r
+/**\r
+ Reads memory-mapped registers in the EFI system memory space. \r
+\r
+ Reads the MMIO registers specified by Address with registers width specified by Width.\r
+ The read value is returned. If such operations are not supported, then ASSERT().\r
+ This function must guarantee that all MMIO read and write operations are serialized.\r
+\r
+ @param Address The MMIO register to read.\r
+ The caller is responsible for aligning the Address if required. \r
+ @param Width The width of the I/O operation.\r
+ \r
+ @return Data read from registers in the EFI system memory space.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
MmioReadWorker (\r
IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r
)\r
{\r
+ EFI_STATUS Status;\r
UINT64 Data;\r
\r
- gCpuIo->Mem.Read (gCpuIo, Width, Address, 1, &Data);\r
+ Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
return Data;\r
}\r
\r
+/**\r
+ Writes memory-mapped registers in the EFI system memory space. \r
+\r
+ Writes the MMIO registers specified by Address with registers width and value specified by Width\r
+ and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r
+ This function must guarantee that all MMIO read and write operations are serialized.\r
+\r
+ @param Address The MMIO register to read.\r
+ The caller is responsible for aligning the Address if required. \r
+ @param Width The width of the I/O operation.\r
+ \r
+ @return Data read from registers in the EFI system memory space.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
MmioWriteWorker (\r
IN UINT64 Data\r
)\r
{\r
- gCpuIo->Mem.Write (gCpuIo, Width, Address, 1, &Data);\r
+ EFI_STATUS Status;\r
+\r
+ Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
return Data;\r
}\r
\r
IN UINTN Port\r
)\r
{\r
+ //\r
+ // Make sure Port is aligned on a 16-bit boundary.\r
+ //\r
+ ASSERT ((Port & 1) == 0);\r
return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);\r
}\r
\r
IN UINT16 Value\r
)\r
{\r
+ //\r
+ // Make sure Port is aligned on a 16-bit boundary.\r
+ //\r
+ ASSERT ((Port & 1) == 0);\r
return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);\r
}\r
\r
IN UINTN Port\r
)\r
{\r
+ //\r
+ // Make sure Port is aligned on a 32-bit boundary.\r
+ //\r
+ ASSERT ((Port & 3) == 0);\r
return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);\r
}\r
\r
IN UINT32 Value\r
)\r
{\r
+ //\r
+ // Make sure Port is aligned on a 32-bit boundary.\r
+ //\r
+ ASSERT ((Port & 3) == 0);\r
return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);\r
}\r
\r
IN UINTN Port\r
)\r
{\r
+ //\r
+ // Make sure Port is aligned on a 64-bit boundary.\r
+ //\r
+ ASSERT ((Port & 7) == 0);\r
return IoReadWorker (Port, EfiCpuIoWidthUint64);\r
}\r
\r
IN UINT64 Value\r
)\r
{\r
+ //\r
+ // Make sure Port is aligned on a 64-bit boundary.\r
+ //\r
+ ASSERT ((Port & 7) == 0);\r
return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);\r
}\r
\r
IN UINTN Address\r
)\r
{\r
+ //\r
+ // Make sure Address is aligned on a 16-bit boundary.\r
+ //\r
+ ASSERT ((Address & 1) == 0);\r
return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);\r
}\r
\r
IN UINT16 Value\r
)\r
{\r
+ //\r
+ // Make sure Address is aligned on a 16-bit boundary.\r
+ //\r
+ ASSERT ((Address & 1) == 0);\r
return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);\r
}\r
\r
IN UINTN Address\r
)\r
{\r
+ //\r
+ // Make sure Address is aligned on a 32-bit boundary.\r
+ //\r
+ ASSERT ((Address & 3) == 0);\r
return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);\r
}\r
\r
IN UINT32 Value\r
)\r
{\r
+ //\r
+ // Make sure Address is aligned on a 32-bit boundary.\r
+ //\r
+ ASSERT ((Address & 3) == 0);\r
return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);\r
}\r
\r
IN UINTN Address\r
)\r
{\r
+ //\r
+ // Make sure Address is aligned on a 64-bit boundary.\r
+ //\r
+ ASSERT ((Address & 7) == 0);\r
return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);\r
}\r
\r
IN UINT64 Value\r
)\r
{\r
+ //\r
+ // Make sure Address is aligned on a 64-bit boundary.\r
+ //\r
+ ASSERT ((Address & 7) == 0);\r
return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);\r
}\r
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