MdePkg: Clean up source files

[mirror_edk2.git] / MdePkg / Library / PeiPciLibPciCfg2 / PciLib.c

diff --git a/MdePkg/Library/PeiPciLibPciCfg2/PciLib.c b/MdePkg/Library/PeiPciLibPciCfg2/PciLib.c
index 0eef525261807c74d9d627854a07ae3cbb1f83a5..4154f7abcc1ddebf59f32b3073c89a811087cf31 100644 (file)
--- a/MdePkg/Library/PeiPciLibPciCfg2/PciLib.c
+++ b/MdePkg/Library/PeiPciLibPciCfg2/PciLib.c
@@ -1,13 +1,13 @@
 /** @file\r
   PCI Library using PCI CFG2 PPI.\r
 \r
-  Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials are\r
   licensed and made available under the terms and conditions of\r
   the BSD License which accompanies this distribution.  The full\r
   text of the license may be found at\r
   http://opensource.org/licenses/bsd-license.php.\r
-  \r
+\r
   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 \r
@@ -90,7 +90,7 @@ PeiPciLibPciCfg2ReadWorker (
 \r
   This function wraps EFI_PEI_PCI_CFG2_PPI.Write() service.\r
   It writes the PCI configuration register specified by Address with the\r
-  value specified by Data. The width of data is specifed by Width.\r
+  value specified by Data. The width of data is specified by Width.\r
   Data is returned.\r
 \r
   @param  Address The address that encodes the PCI Bus, Device, Function and\r
@@ -129,19 +129,19 @@ PeiPciLibPciCfg2WriteWorker (
 }\r
 \r
 /**\r
-  Registers a PCI device so PCI configuration registers may be accessed after \r
+  Registers a PCI device so PCI configuration registers may be accessed after\r
   SetVirtualAddressMap().\r
-  \r
-  Registers the PCI device specified by Address so all the PCI configuration registers \r
+\r
+  Registers the PCI device specified by Address so all the PCI configuration registers\r
   associated with that PCI device may be accessed after SetVirtualAddressMap() is called.\r
-  \r
+\r
   If Address > 0x0FFFFFFF, then ASSERT().\r
 \r
   @param  Address The address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
-  \r
+\r
   @retval RETURN_SUCCESS           The PCI device was registered for runtime access.\r
-  @retval RETURN_UNSUPPORTED       An attempt was made to call this function \r
+  @retval RETURN_UNSUPPORTED       An attempt was made to call this function\r
                                    after ExitBootServices().\r
   @retval RETURN_UNSUPPORTED       The resources required to access the PCI device\r
                                    at runtime could not be mapped.\r
@@ -350,6 +350,7 @@ PciBitFieldRead8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -391,6 +392,7 @@ PciBitFieldWrite8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -432,6 +434,7 @@ PciBitFieldOr8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -475,6 +478,8 @@ PciBitFieldAnd8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -701,6 +706,7 @@ PciBitFieldRead16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -743,6 +749,7 @@ PciBitFieldWrite16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -785,6 +792,7 @@ PciBitFieldOr16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -829,6 +837,8 @@ PciBitFieldAnd16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -1055,6 +1065,7 @@ PciBitFieldRead32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -1097,6 +1108,7 @@ PciBitFieldWrite32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -1139,6 +1151,7 @@ PciBitFieldOr32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -1183,6 +1196,8 @@ PciBitFieldAnd32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r