Make comments match the Spec.

[mirror_edk2.git] / MdePkg / Library / PeiPciSegmentLibPciCfg2 / PciSegmentLib.c

diff --git a/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c b/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c
index 7dca08281be475f26228b235e386d91aee8476d7..215fdabc2e819d30bc9d243e14abc6d58660e134 100644 (file)
--- a/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c
+++ b/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c
@@ -239,10 +239,10 @@ PciSegmentWrite8 (
 }\r
 \r
 /**\r
 }\r
 \r
 /**\r

-  Performs a bitwise inclusive OR of an 8-bit PCI configuration register with an 8-bit value.\r
+  Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value.\r

 \r
   Reads the 8-bit PCI configuration register specified by Address,\r
 \r
   Reads the 8-bit PCI configuration register specified by Address,\r

-  performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+  performs a bitwise OR between the read result and the value specified by OrData,\r

   and writes the result to the 8-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
   and writes the result to the 8-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r


@@ -293,11 +293,11 @@ PciSegmentAnd8 (
 \r
 /**\r
   Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,\r
 \r
 /**\r
   Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,\r

-  followed a  bitwise inclusive OR with another 8-bit value.\r
+  followed a  bitwise OR with another 8-bit value.\r

   \r
   Reads the 8-bit PCI configuration register specified by Address,\r
   performs a bitwise AND between the read result and the value specified by AndData,\r
   \r
   Reads the 8-bit PCI configuration register specified by Address,\r
   performs a bitwise AND between the read result and the value specified by AndData,\r

-  performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,\r
+  performs a bitwise OR between the result of the AND operation and the value specified by OrData,\r

   and writes the result to the 8-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
   and writes the result to the 8-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r


@@ -397,7 +397,7 @@ PciSegmentBitFieldWrite8 (
   writes the result back to the bit field in the 8-bit port.\r
 \r
   Reads the 8-bit PCI configuration register specified by Address, performs a\r
   writes the result back to the bit field in the 8-bit port.\r
 \r
   Reads the 8-bit PCI configuration register specified by Address, performs a\r

-  bitwise inclusive OR between the read result and the value specified by\r
+  bitwise OR between the read result and the value specified by\r

   OrData, and writes the result to the 8-bit PCI configuration register\r
   specified by Address. The value written to the PCI configuration register is\r
   returned. This function must guarantee that all PCI read and write operations\r
   OrData, and writes the result to the 8-bit PCI configuration register\r
   specified by Address. The value written to the PCI configuration register is\r
   returned. This function must guarantee that all PCI read and write operations\r


@@ -476,11 +476,11 @@ PciSegmentBitFieldAnd8 (
 \r
 /**\r
   Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
 \r
 /**\r
   Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r

-  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  bitwise OR, and writes the result back to the bit field in the\r

   8-bit port.\r
 \r
   Reads the 8-bit PCI configuration register specified by Address, performs a\r
   8-bit port.\r
 \r
   Reads the 8-bit PCI configuration register specified by Address, performs a\r

-  bitwise AND followed by a bitwise inclusive OR between the read result and\r
+  bitwise AND followed by a bitwise OR between the read result and\r

   the value specified by AndData, and writes the result to the 8-bit PCI\r
   configuration register specified by Address. The value written to the PCI\r
   configuration register is returned. This function must guarantee that all PCI\r
   the value specified by AndData, and writes the result to the 8-bit PCI\r
   configuration register specified by Address. The value written to the PCI\r
   configuration register is returned. This function must guarantee that all PCI\r


@@ -572,11 +572,11 @@ PciSegmentWrite16 (
 }\r
 \r
 /**\r
 }\r
 \r
 /**\r

-  Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+  Performs a bitwise OR of a 16-bit PCI configuration register with\r

   a 16-bit value.\r
 \r
   Reads the 16-bit PCI configuration register specified by Address, performs a\r
   a 16-bit value.\r
 \r
   Reads the 16-bit PCI configuration register specified by Address, performs a\r

-  bitwise inclusive OR between the read result and the value specified by\r
+  bitwise OR between the read result and the value specified by\r

   OrData, and writes the result to the 16-bit PCI configuration register\r
   specified by Address. The value written to the PCI configuration register is\r
   returned. This function must guarantee that all PCI read and write operations\r
   OrData, and writes the result to the 16-bit PCI configuration register\r
   specified by Address. The value written to the PCI configuration register is\r
   returned. This function must guarantee that all PCI read and write operations\r


@@ -632,11 +632,11 @@ PciSegmentAnd16 (
 \r
 /**\r
   Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,\r
 \r
 /**\r
   Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,\r

-  followed a  bitwise inclusive OR with another 16-bit value.\r
+  followed a  bitwise OR with another 16-bit value.\r

   \r
   Reads the 16-bit PCI configuration register specified by Address,\r
   performs a bitwise AND between the read result and the value specified by AndData,\r
   \r
   Reads the 16-bit PCI configuration register specified by Address,\r
   performs a bitwise AND between the read result and the value specified by AndData,\r

-  performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,\r
+  performs a bitwise OR between the result of the AND operation and the value specified by OrData,\r

   and writes the result to the 16-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
   and writes the result to the 16-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r


@@ -736,7 +736,7 @@ PciSegmentBitFieldWrite16 (
 \r
 /**\r
   Reads the 16-bit PCI configuration register specified by Address,\r
 \r
 /**\r
   Reads the 16-bit PCI configuration register specified by Address,\r

-  performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+  performs a bitwise OR between the read result and the value specified by OrData,\r

   and writes the result to the 16-bit PCI configuration register specified by Address. \r
 \r
   If any reserved bits in Address are set, then ASSERT().\r
   and writes the result to the 16-bit PCI configuration register specified by Address. \r
 \r
   If any reserved bits in Address are set, then ASSERT().\r


@@ -813,11 +813,11 @@ PciSegmentBitFieldAnd16 (
 \r
 /**\r
   Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
 \r
 /**\r
   Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r

-  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  bitwise OR, and writes the result back to the bit field in the\r

   16-bit port.\r
 \r
   Reads the 16-bit PCI configuration register specified by Address, performs a\r
   16-bit port.\r
 \r
   Reads the 16-bit PCI configuration register specified by Address, performs a\r

-  bitwise AND followed by a bitwise inclusive OR between the read result and\r
+  bitwise AND followed by a bitwise OR between the read result and\r

   the value specified by AndData, and writes the result to the 16-bit PCI\r
   configuration register specified by Address. The value written to the PCI\r
   configuration register is returned. This function must guarantee that all PCI\r
   the value specified by AndData, and writes the result to the 16-bit PCI\r
   configuration register specified by Address. The value written to the PCI\r
   configuration register is returned. This function must guarantee that all PCI\r


@@ -909,10 +909,10 @@ PciSegmentWrite32 (
 }\r
 \r
 /**\r
 }\r
 \r
 /**\r

-  Performs a bitwise inclusive OR of a 32-bit PCI configuration register with a 32-bit value.\r
+  Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit value.\r

 \r
   Reads the 32-bit PCI configuration register specified by Address,\r
 \r
   Reads the 32-bit PCI configuration register specified by Address,\r

-  performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+  performs a bitwise OR between the read result and the value specified by OrData,\r

   and writes the result to the 32-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
   and writes the result to the 32-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r


@@ -966,11 +966,11 @@ PciSegmentAnd32 (
 \r
 /**\r
   Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,\r
 \r
 /**\r
   Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,\r

-  followed a  bitwise inclusive OR with another 32-bit value.\r
+  followed a  bitwise OR with another 32-bit value.\r

   \r
   Reads the 32-bit PCI configuration register specified by Address,\r
   performs a bitwise AND between the read result and the value specified by AndData,\r
   \r
   Reads the 32-bit PCI configuration register specified by Address,\r
   performs a bitwise AND between the read result and the value specified by AndData,\r

-  performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,\r
+  performs a bitwise OR between the result of the AND operation and the value specified by OrData,\r

   and writes the result to the 32-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
   and writes the result to the 32-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r


@@ -1073,7 +1073,7 @@ PciSegmentBitFieldWrite32 (
   writes the result back to the bit field in the 32-bit port.\r
 \r
   Reads the 32-bit PCI configuration register specified by Address, performs a\r
   writes the result back to the bit field in the 32-bit port.\r
 \r
   Reads the 32-bit PCI configuration register specified by Address, performs a\r

-  bitwise inclusive OR between the read result and the value specified by\r
+  bitwise OR between the read result and the value specified by\r

   OrData, and writes the result to the 32-bit PCI configuration register\r
   specified by Address. The value written to the PCI configuration register is\r
   returned. This function must guarantee that all PCI read and write operations\r
   OrData, and writes the result to the 32-bit PCI configuration register\r
   specified by Address. The value written to the PCI configuration register is\r
   returned. This function must guarantee that all PCI read and write operations\r


@@ -1152,11 +1152,11 @@ PciSegmentBitFieldAnd32 (
 \r
 /**\r
   Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
 \r
 /**\r
   Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r

-  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  bitwise OR, and writes the result back to the bit field in the\r

   32-bit port.\r
 \r
   Reads the 32-bit PCI configuration register specified by Address, performs a\r
   32-bit port.\r
 \r
   Reads the 32-bit PCI configuration register specified by Address, performs a\r

-  bitwise AND followed by a bitwise inclusive OR between the read result and\r
+  bitwise AND followed by a bitwise OR between the read result and\r

   the value specified by AndData, and writes the result to the 32-bit PCI\r
   configuration register specified by Address. The value written to the PCI\r
   configuration register is returned. This function must guarantee that all PCI\r
   the value specified by AndData, and writes the result to the 32-bit PCI\r
   configuration register specified by Address. The value written to the PCI\r
   configuration register is returned. This function must guarantee that all PCI\r