Make comments match the Spec.

[mirror_edk2.git] / MdePkg / Library / PeiPciSegmentLibPciCfg2 / PciSegmentLib.c

diff --git a/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c b/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c
index c2f2ebbc9ed6762e768f762c25026e7b3498e630..215fdabc2e819d30bc9d243e14abc6d58660e134 100644 (file)
--- a/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c
+++ b/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c
@@ -239,10 +239,10 @@ PciSegmentWrite8 (
 }\r
 \r
 /**\r
-  Performs a bitwise inclusive OR of an 8-bit PCI configuration register with an 8-bit value.\r
+  Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value.\r
 \r
   Reads the 8-bit PCI configuration register specified by Address,\r
-  performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+  performs a bitwise OR between the read result and the value specified by OrData,\r
   and writes the result to the 8-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
@@ -293,11 +293,11 @@ PciSegmentAnd8 (
 \r
 /**\r
   Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,\r
-  followed a  bitwise inclusive OR with another 8-bit value.\r
+  followed a  bitwise OR with another 8-bit value.\r
   \r
   Reads the 8-bit PCI configuration register specified by Address,\r
   performs a bitwise AND between the read result and the value specified by AndData,\r
-  performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,\r
+  performs a bitwise OR between the result of the AND operation and the value specified by OrData,\r
   and writes the result to the 8-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
@@ -397,7 +397,7 @@ PciSegmentBitFieldWrite8 (
   writes the result back to the bit field in the 8-bit port.\r
 \r
   Reads the 8-bit PCI configuration register specified by Address, performs a\r
-  bitwise inclusive OR between the read result and the value specified by\r
+  bitwise OR between the read result and the value specified by\r
   OrData, and writes the result to the 8-bit PCI configuration register\r
   specified by Address. The value written to the PCI configuration register is\r
   returned. This function must guarantee that all PCI read and write operations\r
@@ -476,11 +476,11 @@ PciSegmentBitFieldAnd8 (
 \r
 /**\r
   Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
-  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  bitwise OR, and writes the result back to the bit field in the\r
   8-bit port.\r
 \r
   Reads the 8-bit PCI configuration register specified by Address, performs a\r
-  bitwise AND followed by a bitwise inclusive OR between the read result and\r
+  bitwise AND followed by a bitwise OR between the read result and\r
   the value specified by AndData, and writes the result to the 8-bit PCI\r
   configuration register specified by Address. The value written to the PCI\r
   configuration register is returned. This function must guarantee that all PCI\r
@@ -572,11 +572,11 @@ PciSegmentWrite16 (
 }\r
 \r
 /**\r
-  Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+  Performs a bitwise OR of a 16-bit PCI configuration register with\r
   a 16-bit value.\r
 \r
   Reads the 16-bit PCI configuration register specified by Address, performs a\r
-  bitwise inclusive OR between the read result and the value specified by\r
+  bitwise OR between the read result and the value specified by\r
   OrData, and writes the result to the 16-bit PCI configuration register\r
   specified by Address. The value written to the PCI configuration register is\r
   returned. This function must guarantee that all PCI read and write operations\r
@@ -632,11 +632,11 @@ PciSegmentAnd16 (
 \r
 /**\r
   Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,\r
-  followed a  bitwise inclusive OR with another 16-bit value.\r
+  followed a  bitwise OR with another 16-bit value.\r
   \r
   Reads the 16-bit PCI configuration register specified by Address,\r
   performs a bitwise AND between the read result and the value specified by AndData,\r
-  performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,\r
+  performs a bitwise OR between the result of the AND operation and the value specified by OrData,\r
   and writes the result to the 16-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
@@ -736,7 +736,7 @@ PciSegmentBitFieldWrite16 (
 \r
 /**\r
   Reads the 16-bit PCI configuration register specified by Address,\r
-  performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+  performs a bitwise OR between the read result and the value specified by OrData,\r
   and writes the result to the 16-bit PCI configuration register specified by Address. \r
 \r
   If any reserved bits in Address are set, then ASSERT().\r
@@ -813,11 +813,11 @@ PciSegmentBitFieldAnd16 (
 \r
 /**\r
   Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
-  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  bitwise OR, and writes the result back to the bit field in the\r
   16-bit port.\r
 \r
   Reads the 16-bit PCI configuration register specified by Address, performs a\r
-  bitwise AND followed by a bitwise inclusive OR between the read result and\r
+  bitwise AND followed by a bitwise OR between the read result and\r
   the value specified by AndData, and writes the result to the 16-bit PCI\r
   configuration register specified by Address. The value written to the PCI\r
   configuration register is returned. This function must guarantee that all PCI\r
@@ -909,10 +909,10 @@ PciSegmentWrite32 (
 }\r
 \r
 /**\r
-  Performs a bitwise inclusive OR of a 32-bit PCI configuration register with a 32-bit value.\r
+  Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit value.\r
 \r
   Reads the 32-bit PCI configuration register specified by Address,\r
-  performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+  performs a bitwise OR between the read result and the value specified by OrData,\r
   and writes the result to the 32-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
@@ -966,11 +966,11 @@ PciSegmentAnd32 (
 \r
 /**\r
   Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,\r
-  followed a  bitwise inclusive OR with another 32-bit value.\r
+  followed a  bitwise OR with another 32-bit value.\r
   \r
   Reads the 32-bit PCI configuration register specified by Address,\r
   performs a bitwise AND between the read result and the value specified by AndData,\r
-  performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,\r
+  performs a bitwise OR between the result of the AND operation and the value specified by OrData,\r
   and writes the result to the 32-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
@@ -1073,7 +1073,7 @@ PciSegmentBitFieldWrite32 (
   writes the result back to the bit field in the 32-bit port.\r
 \r
   Reads the 32-bit PCI configuration register specified by Address, performs a\r
-  bitwise inclusive OR between the read result and the value specified by\r
+  bitwise OR between the read result and the value specified by\r
   OrData, and writes the result to the 32-bit PCI configuration register\r
   specified by Address. The value written to the PCI configuration register is\r
   returned. This function must guarantee that all PCI read and write operations\r
@@ -1152,11 +1152,11 @@ PciSegmentBitFieldAnd32 (
 \r
 /**\r
   Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
-  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  bitwise OR, and writes the result back to the bit field in the\r
   32-bit port.\r
 \r
   Reads the 32-bit PCI configuration register specified by Address, performs a\r
-  bitwise AND followed by a bitwise inclusive OR between the read result and\r
+  bitwise AND followed by a bitwise OR between the read result and\r
   the value specified by AndData, and writes the result to the 32-bit PCI\r
   configuration register specified by Address. The value written to the PCI\r
   configuration register is returned. This function must guarantee that all PCI\r
@@ -1198,24 +1198,20 @@ PciSegmentBitFieldAndThenOr32 (
 /**\r
   Reads a range of PCI configuration registers into a caller supplied buffer.\r
 \r
-  Reads the range of PCI configuration registers specified by StartAddress and\r
-  Size into the buffer specified by Buffer. This function only allows the PCI\r
-  configuration registers from a single PCI function to be read. Size is\r
-  returned. When possible 32-bit PCI configuration read cycles are used to read\r
-  from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
-  and 16-bit PCI configuration read cycles may be used at the beginning and the\r
-  end of the range.\r
-\r
-  If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+  Reads the range of PCI configuration registers specified by StartAddress\r
+  and Size into the buffer specified by Buffer.\r
+  This function only allows the PCI configuration registers from a single PCI function to be read.\r
+  Size is returned.\r
+  \r
+  If any reserved bits in StartAddress are set, then ASSERT().\r
   If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
   If Size > 0 and Buffer is NULL, then ASSERT().\r
 \r
-  @param  StartAddress  Starting address that encodes the PCI Segment, Bus, Device,\r
-                        Function and Register.\r
+  @param  StartAddress  Starting address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
   @param  Size          Size in bytes of the transfer.\r
   @param  Buffer        Pointer to a buffer receiving the data read.\r
 \r
-  @return Size\r
+  @return The parameter of Size.\r
 \r
 **/\r
 UINTN\r
@@ -1294,23 +1290,18 @@ PciSegmentReadBuffer (
 \r
 \r
 /**\r
-  Copies the data in a caller supplied buffer to a specified range of PCI\r
-  configuration space.\r
-\r
-  Writes the range of PCI configuration registers specified by StartAddress and\r
-  Size from the buffer specified by Buffer. This function only allows the PCI\r
-  configuration registers from a single PCI function to be written. Size is\r
-  returned. When possible 32-bit PCI configuration write cycles are used to\r
-  write from StartAdress to StartAddress + Size. Due to alignment restrictions,\r
-  8-bit and 16-bit PCI configuration write cycles may be used at the beginning\r
-  and the end of the range.\r
-\r
-  If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+  Copies the data in a caller supplied buffer to a specified range of PCI configuration space.\r
+\r
+  Writes the range of PCI configuration registers specified by StartAddress\r
+  and Size from the buffer specified by Buffer.\r
+  This function only allows the PCI configuration registers from a single PCI function to be written.\r
+  Size is returned.\r
+  \r
+  If any reserved bits in StartAddress are set, then ASSERT().\r
   If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
   If Size > 0 and Buffer is NULL, then ASSERT().\r
 \r
-  @param  StartAddress  Starting address that encodes the PCI Segment, Bus, Device,\r
-                        Function and Register.\r
+  @param  StartAddress  Starting address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
   @param  Size          Size in bytes of the transfer.\r
   @param  Buffer        Pointer to a buffer containing the data to write.\r
 \r