Minor grammatical work--mostly adding periods. Items with ONLY period added did...

[mirror_edk2.git] / MdePkg / Library / PeiPciSegmentLibPciCfg2 / PciSegmentLib.c

diff --git a/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c b/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c
index 0d960c5b936799984792da4febc9d5fc39fb2591..8330243b1ec37ed871b6e451735bc025b35955a8 100644 (file)
--- a/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c
+++ b/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c
@@ -49,7 +49,8 @@
 \r
   This internal function retrieves PCI CFG2 PPI from PPI database.\r
 \r
-  @param  Address       The address that encodes the PCI Segment, Bus, Device, Function and Register.\r
+  @param  Address       The address that encodes the PCI Segment, Bus, Device, \r
+                        Function and Register.\r
 \r
   @return The pointer to PCI CFG2 PPI.\r
 \r
@@ -94,7 +95,7 @@ InternalGetPciCfg2Ppi (
 \r
   @param  Address The address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
-  @param  Width   Width of data to read\r
+  @param  Width   The width of data to read\r
 \r
   @return The value read from the PCI configuration register.\r
 \r
@@ -132,7 +133,7 @@ PeiPciSegmentLibPciCfg2ReadWorker (
 \r
   @param  Address The address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
-  @param  Width   Width of data to write\r
+  @param  Width   The width of data to write\r
   @param  Data    The value to write.\r
 \r
   @return The value written to the PCI configuration register.\r
@@ -197,7 +198,8 @@ PciSegmentRegisterForRuntimeAccess (
   \r
   If any reserved bits in Address are set, then ASSERT().\r
   \r
-  @param  Address   The address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+  @param  Address   The address that encodes the PCI Segment, Bus, Device, Function, \r
+                    and Register.\r
 \r
   @return The 8-bit PCI configuration register specified by Address.\r
 \r
@@ -646,7 +648,7 @@ PciSegmentAnd16 (
   If Address is not aligned on a 16-bit boundary, then ASSERT().\r
 \r
   @param  Address   The address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
-  @param  AndData    The value to AND with the PCI configuration register.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
   @param  OrData    The value to OR with the PCI configuration register.\r
 \r
   @return The value written to the PCI configuration register.\r
@@ -867,7 +869,8 @@ PciSegmentBitFieldAndThenOr16 (
   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 32-bit boundary, then ASSERT().\r
 \r
-  @param  Address   The address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+  @param  Address   The address that encodes the PCI Segment, Bus, Device, Function, \r
+                    and Register.\r
 \r
   @return The 32-bit PCI configuration register specified by Address.\r
 \r
@@ -892,7 +895,8 @@ PciSegmentRead32 (
   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 32-bit boundary, then ASSERT().\r
 \r
-  @param  Address     The address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+  @param  Address     The address that encodes the PCI Segment, Bus, Device, \r
+                      Function, and Register.\r
   @param  Value       The value to write.\r
 \r
   @return The parameter of Value.\r
@@ -950,7 +954,8 @@ PciSegmentOr32 (
   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 32-bit boundary, then ASSERT().\r
 \r
-  @param  Address   The address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+  @param  Address   The address that encodes the PCI Segment, Bus, Device, Function, \r
+                    and Register.\r
   @param  AndData   The value to AND with the PCI configuration register.\r
 \r
   @return The value written to the PCI configuration register.\r
@@ -980,7 +985,8 @@ PciSegmentAnd32 (
   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 32-bit boundary, then ASSERT().\r
 \r
-  @param  Address   The address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+  @param  Address   The address that encodes the PCI Segment, Bus, Device, Function,\r
+                    and Register.\r
   @param  AndData   The value to AND with the PCI configuration register.\r
   @param  OrData    The value to OR with the PCI configuration register.\r
 \r
@@ -1213,8 +1219,8 @@ PciSegmentBitFieldAndThenOr32 (
   If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
   If Size > 0 and Buffer is NULL, then ASSERT().\r
 \r
-  @param  StartAddress  The starting address that encodes the PCI Segment, Bus, Device,\r
-                        Function and Register.\r
+  @param  StartAddress  The starting address that encodes the PCI Segment, Bus, \r
+                        Device, Function and Register.\r
   @param  Size          The size in bytes of the transfer.\r
   @param  Buffer        The pointer to a buffer receiving the data read.\r
 \r
@@ -1312,8 +1318,8 @@ PciSegmentReadBuffer (
   If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
   If Size > 0 and Buffer is NULL, then ASSERT().\r
 \r
-  @param  StartAddress  The starting address that encodes the PCI Segment, Bus, Device,\r
-                        Function and Register.\r
+  @param  StartAddress  The starting address that encodes the PCI Segment, Bus, \r
+                        Device, Function and Register.\r
   @param  Size          The size in bytes of the transfer.\r
   @param  Buffer        The pointer to a buffer containing the data to write.\r
 \r