-/*++\r
+/** @file\r
+ PEI Services Table Pointer Library implementation for IPF that uses Kernel\r
+ Register 7 to store the pointer.\r
\r
-Copyright (c) 2006 Intel Corporation. All rights reserved\r
-This software and associated documentation (if any) is furnished\r
-under a license and may only be used or copied in accordance\r
-with the terms of the license. Except as permitted by such\r
-license, no part of this software or documentation may be\r
-reproduced, stored in a retrieval system, or transmitted in any\r
-form or by any means without the express written consent of\r
-Intel Corporation.\r
+ Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php.\r
\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
+**/\r
\r
- PEI Services Table Pointer Library.\r
- \r
---*/\r
-\r
+#include <PiPei.h>\r
#include <Library/BaseLib.h>\r
+#include <Library/DebugLib.h>\r
\r
/**\r
- The function returns the pointer to PeiServices.\r
+ Retrieves the cached value of the PEI Services Table pointer.\r
\r
- The function returns the pointer to PeiServices.\r
- It will ASSERT() if the pointer to PeiServices is NULL.\r
+ Returns the cached value of the PEI Services Table pointer in a CPU specific manner \r
+ as specified in the CPU binding section of the Platform Initialization Pre-EFI \r
+ Initialization Core Interface Specification.\r
+ \r
+ If the cached PEI Services Table pointer is NULL, then ASSERT().\r
\r
- @retval The pointer to PeiServices.\r
+ @return The pointer to PeiServices.\r
\r
**/\r
-EFI_PEI_SERVICES **\r
+CONST EFI_PEI_SERVICES **\r
EFIAPI\r
GetPeiServicesTablePointer (\r
VOID\r
)\r
{\r
- EFI_PEI_SERVICES **PeiServices;\r
+ CONST EFI_PEI_SERVICES **PeiServices;\r
\r
- PeiServices = (EFI_PEI_SERVICES **)(UINTN)AsmReadKr7 ();\r
+ PeiServices = (CONST EFI_PEI_SERVICES **)(UINTN)AsmReadKr7 ();\r
ASSERT (PeiServices != NULL);\r
return PeiServices;\r
}\r
\r
+\r
+/**\r
+ Caches a pointer PEI Services Table. \r
+ \r
+ Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer \r
+ in a CPU specific manner as specified in the CPU binding section of the Platform Initialization \r
+ Pre-EFI Initialization Core Interface Specification. \r
+ The function set the pointer of PEI services in KR7 register \r
+ according to PI specification.\r
+ \r
+ If PeiServicesTablePointer is NULL, then ASSERT().\r
+ \r
+ @param PeiServicesTablePointer The address of PeiServices pointer.\r
+**/\r
+VOID\r
+EFIAPI\r
+SetPeiServicesTablePointer (\r
+ IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer\r
+ )\r
+{\r
+ ASSERT (PeiServicesTablePointer != NULL);\r
+ AsmWriteKr7 ((UINT64)(UINTN)PeiServicesTablePointer);\r
+}\r
+ \r
+/**\r
+ Perform CPU specific actions required to migrate the PEI Services Table \r
+ pointer from temporary RAM to permanent RAM.\r
+\r
+ For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes \r
+ immediately preceding the Interrupt Descriptor Table (IDT) in memory.\r
+ For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes \r
+ immediately preceding the Interrupt Descriptor Table (IDT) in memory.\r
+ For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in\r
+ a dedicated CPU register. This means that there is no memory storage \r
+ associated with storing the PEI Services Table pointer, so no additional \r
+ migration actions are required for Itanium or ARM CPUs.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+MigratePeiServicesTablePointer (\r
+ )\r
+{\r
+ return;\r
+}\r
+\r