/** @file\r
I/O Library.\r
- The implementation of I/O operation for this library instance \r
+ The implementation of I/O operation for this library instance\r
are based on EFI_CPU_IO_PROTOCOL.\r
- \r
- Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>\r
- Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php.\r
+ Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
UINT64\r
EFIAPI\r
IoReadWorker (\r
- IN UINTN Port,\r
- IN EFI_SMM_IO_WIDTH Width\r
+ IN UINTN Port,\r
+ IN EFI_SMM_IO_WIDTH Width\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT64 Data;\r
+ EFI_STATUS Status;\r
+ UINT64 Data;\r
\r
Status = gSmst->SmmIo.Io.Read (&gSmst->SmmIo, Width, Port, 1, &Data);\r
ASSERT_EFI_ERROR (Status);\r
UINT64\r
EFIAPI\r
IoWriteWorker (\r
- IN UINTN Port,\r
- IN EFI_SMM_IO_WIDTH Width,\r
- IN UINT64 Data\r
+ IN UINTN Port,\r
+ IN EFI_SMM_IO_WIDTH Width,\r
+ IN UINT64 Data\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
Status = gSmst->SmmIo.Io.Write (&gSmst->SmmIo, Width, Port, 1, &Data);\r
ASSERT_EFI_ERROR (Status);\r
UINT64\r
EFIAPI\r
MmioReadWorker (\r
- IN UINTN Address,\r
- IN EFI_SMM_IO_WIDTH Width\r
+ IN UINTN Address,\r
+ IN EFI_SMM_IO_WIDTH Width\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT64 Data;\r
+ EFI_STATUS Status;\r
+ UINT64 Data;\r
\r
Status = gSmst->SmmIo.Mem.Read (&gSmst->SmmIo, Width, Address, 1, &Data);\r
ASSERT_EFI_ERROR (Status);\r
The caller is responsible for aligning the Address if required.\r
@param Width The width of the I/O operation.\r
@param Data The value to write to the I/O port.\r
- \r
+\r
@return Data read from registers in the EFI system memory space.\r
\r
**/\r
UINT64\r
EFIAPI\r
MmioWriteWorker (\r
- IN UINTN Address,\r
- IN EFI_SMM_IO_WIDTH Width,\r
- IN UINT64 Data\r
+ IN UINTN Address,\r
+ IN EFI_SMM_IO_WIDTH Width,\r
+ IN UINT64 Data\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
Status = gSmst->SmmIo.Mem.Write (&gSmst->SmmIo, Width, Address, 1, &Data);\r
ASSERT_EFI_ERROR (Status);\r
UINT8\r
EFIAPI\r
IoRead8 (\r
- IN UINTN Port\r
+ IN UINTN Port\r
)\r
{\r
return (UINT8)IoReadWorker (Port, SMM_IO_UINT8);\r
UINT8\r
EFIAPI\r
IoWrite8 (\r
- IN UINTN Port,\r
- IN UINT8 Value\r
+ IN UINTN Port,\r
+ IN UINT8 Value\r
)\r
{\r
return (UINT8)IoWriteWorker (Port, SMM_IO_UINT8, Value);\r
serialized.\r
\r
If Port is not aligned on a 16-bit boundary, then ASSERT().\r
- \r
+\r
If 16-bit I/O port operations are not supported, then ASSERT().\r
\r
@param Port The I/O port to read.\r
UINT16\r
EFIAPI\r
IoRead16 (\r
- IN UINTN Port\r
+ IN UINTN Port\r
)\r
{\r
//\r
UINT16\r
EFIAPI\r
IoWrite16 (\r
- IN UINTN Port,\r
- IN UINT16 Value\r
+ IN UINTN Port,\r
+ IN UINT16 Value\r
)\r
{\r
//\r
Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r
This function must guarantee that all I/O read and write operations are\r
serialized.\r
- \r
+\r
If Port is not aligned on a 32-bit boundary, then ASSERT().\r
\r
If 32-bit I/O port operations are not supported, then ASSERT().\r
UINT32\r
EFIAPI\r
IoRead32 (\r
- IN UINTN Port\r
+ IN UINTN Port\r
)\r
{\r
//\r
UINT32\r
EFIAPI\r
IoWrite32 (\r
- IN UINTN Port,\r
- IN UINT32 Value\r
+ IN UINTN Port,\r
+ IN UINT32 Value\r
)\r
{\r
//\r
UINT64\r
EFIAPI\r
IoRead64 (\r
- IN UINTN Port\r
+ IN UINTN Port\r
)\r
{\r
//\r
operations are serialized.\r
\r
If Port is not aligned on a 64-bit boundary, then ASSERT().\r
- \r
+\r
If 64-bit I/O port operations are not supported, then ASSERT().\r
\r
@param Port The I/O port to write.\r
UINT64\r
EFIAPI\r
IoWrite64 (\r
- IN UINTN Port,\r
- IN UINT64 Value\r
+ IN UINTN Port,\r
+ IN UINT64 Value\r
)\r
{\r
//\r
VOID\r
EFIAPI\r
IoReadFifo8 (\r
- IN UINTN Port,\r
- IN UINTN Count,\r
- OUT VOID *Buffer\r
+ IN UINTN Port,\r
+ IN UINTN Count,\r
+ OUT VOID *Buffer\r
)\r
{\r
- UINT8 *Buffer8;\r
+ UINT8 *Buffer8;\r
\r
Buffer8 = (UINT8 *)Buffer;\r
- while (Count--) {\r
+ while (Count-- > 0) {\r
*Buffer8++ = IoRead8 (Port);\r
}\r
}\r
VOID\r
EFIAPI\r
IoWriteFifo8 (\r
- IN UINTN Port,\r
- IN UINTN Count,\r
- IN VOID *Buffer\r
+ IN UINTN Port,\r
+ IN UINTN Count,\r
+ IN VOID *Buffer\r
)\r
{\r
- UINT8 *Buffer8;\r
+ UINT8 *Buffer8;\r
\r
Buffer8 = (UINT8 *)Buffer;\r
- while (Count--) {\r
+ while (Count-- > 0) {\r
IoWrite8 (Port, *Buffer8++);\r
}\r
}\r
VOID\r
EFIAPI\r
IoReadFifo16 (\r
- IN UINTN Port,\r
- IN UINTN Count,\r
- OUT VOID *Buffer\r
+ IN UINTN Port,\r
+ IN UINTN Count,\r
+ OUT VOID *Buffer\r
)\r
{\r
- UINT16 *Buffer16;\r
+ UINT16 *Buffer16;\r
\r
//\r
// Make sure Port is aligned on a 16-bit boundary.\r
//\r
ASSERT ((Port & 1) == 0);\r
Buffer16 = (UINT16 *)Buffer;\r
- while (Count--) {\r
+ while (Count-- > 0) {\r
*Buffer16++ = IoRead16 (Port);\r
}\r
}\r
VOID\r
EFIAPI\r
IoWriteFifo16 (\r
- IN UINTN Port,\r
- IN UINTN Count,\r
- IN VOID *Buffer\r
+ IN UINTN Port,\r
+ IN UINTN Count,\r
+ IN VOID *Buffer\r
)\r
{\r
- UINT16 *Buffer16;\r
+ UINT16 *Buffer16;\r
\r
//\r
// Make sure Port is aligned on a 16-bit boundary.\r
//\r
ASSERT ((Port & 1) == 0);\r
Buffer16 = (UINT16 *)Buffer;\r
- while (Count--) {\r
+ while (Count-- > 0) {\r
IoWrite16 (Port, *Buffer16++);\r
}\r
}\r
VOID\r
EFIAPI\r
IoReadFifo32 (\r
- IN UINTN Port,\r
- IN UINTN Count,\r
- OUT VOID *Buffer\r
+ IN UINTN Port,\r
+ IN UINTN Count,\r
+ OUT VOID *Buffer\r
)\r
{\r
- UINT32 *Buffer32;\r
+ UINT32 *Buffer32;\r
\r
//\r
// Make sure Port is aligned on a 32-bit boundary.\r
//\r
ASSERT ((Port & 3) == 0);\r
Buffer32 = (UINT32 *)Buffer;\r
- while (Count--) {\r
+ while (Count-- > 0) {\r
*Buffer32++ = IoRead32 (Port);\r
}\r
}\r
VOID\r
EFIAPI\r
IoWriteFifo32 (\r
- IN UINTN Port,\r
- IN UINTN Count,\r
- IN VOID *Buffer\r
+ IN UINTN Port,\r
+ IN UINTN Count,\r
+ IN VOID *Buffer\r
)\r
{\r
- UINT32 *Buffer32;\r
+ UINT32 *Buffer32;\r
\r
//\r
// Make sure Port is aligned on a 32-bit boundary.\r
//\r
ASSERT ((Port & 3) == 0);\r
Buffer32 = (UINT32 *)Buffer;\r
- while (Count--) {\r
+ while (Count-- > 0) {\r
IoWrite32 (Port, *Buffer32++);\r
}\r
}\r
UINT8\r
EFIAPI\r
MmioRead8 (\r
- IN UINTN Address\r
+ IN UINTN Address\r
)\r
{\r
return (UINT8)MmioReadWorker (Address, SMM_IO_UINT8);\r
UINT8\r
EFIAPI\r
MmioWrite8 (\r
- IN UINTN Address,\r
- IN UINT8 Value\r
+ IN UINTN Address,\r
+ IN UINT8 Value\r
)\r
{\r
return (UINT8)MmioWriteWorker (Address, SMM_IO_UINT8, Value);\r
operations are serialized.\r
\r
If Address is not aligned on a 16-bit boundary, then ASSERT().\r
- \r
+\r
If 16-bit MMIO register operations are not supported, then ASSERT().\r
\r
@param Address The MMIO register to read.\r
UINT16\r
EFIAPI\r
MmioRead16 (\r
- IN UINTN Address\r
+ IN UINTN Address\r
)\r
{\r
//\r
and write operations are serialized.\r
\r
If Address is not aligned on a 16-bit boundary, then ASSERT().\r
- \r
+\r
If 16-bit MMIO register operations are not supported, then ASSERT().\r
\r
@param Address The MMIO register to write.\r
UINT16\r
EFIAPI\r
MmioWrite16 (\r
- IN UINTN Address,\r
- IN UINT16 Value\r
+ IN UINTN Address,\r
+ IN UINT16 Value\r
)\r
{\r
//\r
operations are serialized.\r
\r
If Address is not aligned on a 32-bit boundary, then ASSERT().\r
- \r
+\r
If 32-bit MMIO register operations are not supported, then ASSERT().\r
\r
@param Address The MMIO register to read.\r
UINT32\r
EFIAPI\r
MmioRead32 (\r
- IN UINTN Address\r
+ IN UINTN Address\r
)\r
{\r
//\r
and write operations are serialized.\r
\r
If Address is not aligned on a 32-bit boundary, then ASSERT().\r
- \r
+\r
If 32-bit MMIO register operations are not supported, then ASSERT().\r
\r
@param Address The MMIO register to write.\r
UINT32\r
EFIAPI\r
MmioWrite32 (\r
- IN UINTN Address,\r
- IN UINT32 Value\r
+ IN UINTN Address,\r
+ IN UINT32 Value\r
)\r
{\r
//\r
operations are serialized.\r
\r
If Address is not aligned on a 64-bit boundary, then ASSERT().\r
- \r
+\r
If 64-bit MMIO register operations are not supported, then ASSERT().\r
\r
@param Address The MMIO register to read.\r
UINT64\r
EFIAPI\r
MmioRead64 (\r
- IN UINTN Address\r
+ IN UINTN Address\r
)\r
{\r
//\r
and write operations are serialized.\r
\r
If Address is not aligned on a 64-bit boundary, then ASSERT().\r
- \r
+\r
If 64-bit MMIO register operations are not supported, then ASSERT().\r
\r
@param Address The MMIO register to write.\r
UINT64\r
EFIAPI\r
MmioWrite64 (\r
- IN UINTN Address,\r
- IN UINT64 Value\r
+ IN UINTN Address,\r
+ IN UINT64 Value\r
)\r
{\r
//\r
projects / mirror_edk2.git / blobdiff