UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm

[mirror_edk2.git] / MdePkg / Library / UefiPciLibPciRootBridgeIo / PciLib.c

diff --git a/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c b/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c
index 622a7ccd1ac5cbd2f7a1972c02cb6e9bb7a36625..f4e9882ebae236355d64d9b1bb5fe3d6fbbe836f 100644 (file)
--- a/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c
+++ b/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c
@@ -1,20 +1,11 @@
 /** @file\r
   PCI Library using PCI Root Bridge I/O Protocol.\r
 \r
 /** @file\r
   PCI Library using PCI Root Bridge I/O Protocol.\r
 \r

-  Copyright (c) 2007 - 2009, Intel Corporation. All rights reserved.<BR>\r
-  This program and the accompanying materials are\r
-  licensed and made available under the terms and conditions of\r
-  the BSD License which accompanies this distribution.  The full\r
-  text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php.\r
-  \r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r

 \r
 **/\r
 \r
 \r
 **/\r
 \r

-#include <PiDxe.h>\r
-\r

 #include <Protocol/PciRootBridgeIo.h>\r
 \r
 #include <Library/PciLib.h>\r
 #include <Protocol/PciRootBridgeIo.h>\r
 \r
 #include <Library/PciLib.h>\r


@@ -30,7 +21,7 @@
   @param  M Additional bits to assert to be zero.\r
 \r
 **/\r
   @param  M Additional bits to assert to be zero.\r
 \r
 **/\r

-#define ASSERT_INVALID_PCI_ADDRESS(A,M) \\r
+#define ASSERT_INVALID_PCI_ADDRESS(A, M) \\r

   ASSERT (((A) & (~0xfffffff | (M))) == 0)\r
 \r
 /**\r
   ASSERT (((A) & (~0xfffffff | (M))) == 0)\r
 \r
 /**\r


@@ -46,30 +37,30 @@
 //\r
 // Global varible to cache pointer to PCI Root Bridge I/O protocol.\r
 //\r
 //\r
 // Global varible to cache pointer to PCI Root Bridge I/O protocol.\r
 //\r

-EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL      *mPciRootBridgeIo = NULL; \r
+EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *mPciRootBridgeIo = NULL;\r

 \r
 /**\r
   The constructor function caches the pointer to PCI Root Bridge I/O protocol.\r
 \r
 /**\r
   The constructor function caches the pointer to PCI Root Bridge I/O protocol.\r

-  \r
+\r

   The constructor function locates PCI Root Bridge I/O protocol from protocol database.\r
   The constructor function locates PCI Root Bridge I/O protocol from protocol database.\r

-  It will ASSERT() if that operation fails and it will always return EFI_SUCCESS. \r
+  It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.\r

 \r
   @param  ImageHandle   The firmware allocated handle for the EFI image.\r
   @param  SystemTable   A pointer to the EFI System Table.\r
 \r
   @param  ImageHandle   The firmware allocated handle for the EFI image.\r
   @param  SystemTable   A pointer to the EFI System Table.\r

-  \r
+\r

   @retval EFI_SUCCESS   The constructor always returns EFI_SUCCESS.\r
 \r
 **/\r
 EFI_STATUS\r
 EFIAPI\r
 PciLibConstructor (\r
   @retval EFI_SUCCESS   The constructor always returns EFI_SUCCESS.\r
 \r
 **/\r
 EFI_STATUS\r
 EFIAPI\r
 PciLibConstructor (\r

-  IN EFI_HANDLE                ImageHandle,\r
-  IN EFI_SYSTEM_TABLE          *SystemTable\r
+  IN EFI_HANDLE        ImageHandle,\r
+  IN EFI_SYSTEM_TABLE  *SystemTable\r

   )\r
 {\r
   EFI_STATUS  Status;\r
   )\r
 {\r
   EFI_STATUS  Status;\r

-  \r
-  Status = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, (VOID**) &mPciRootBridgeIo);\r
+\r
+  Status = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, (VOID **)&mPciRootBridgeIo);\r

   ASSERT_EFI_ERROR (Status);\r
   ASSERT (mPciRootBridgeIo != NULL);\r
 \r
   ASSERT_EFI_ERROR (Status);\r
   ASSERT (mPciRootBridgeIo != NULL);\r
 \r


@@ -85,7 +76,7 @@ PciLibConstructor (
 \r
   @param  Address The address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
 \r
   @param  Address The address that encodes the PCI Bus, Device, Function and\r
                   Register.\r

-  @param  Width   Width of data to read\r
+  @param  Width   The width of data to read\r

 \r
   @return The value read from the PCI configuration register.\r
 \r
 \r
   @return The value read from the PCI configuration register.\r
 \r


@@ -114,12 +105,12 @@ DxePciLibPciRootBridgeIoReadWorker (
 \r
   This function wraps EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.Pci.Write() service.\r
   It writes the PCI configuration register specified by Address with the\r
 \r
   This function wraps EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.Pci.Write() service.\r
   It writes the PCI configuration register specified by Address with the\r

-  value specified by Data. The width of data is specifed by Width.\r
+  value specified by Data. The width of data is specified by Width.\r

   Data is returned.\r
 \r
   @param  Address The address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
   Data is returned.\r
 \r
   @param  Address The address that encodes the PCI Bus, Device, Function and\r
                   Register.\r

-  @param  Width   Width of data to write\r
+  @param  Width   The width of data to write\r

   @param  Data    The value to write.\r
 \r
   @return The value written to the PCI configuration register.\r
   @param  Data    The value to write.\r
 \r
   @return The value written to the PCI configuration register.\r


@@ -143,19 +134,19 @@ DxePciLibPciRootBridgeIoWriteWorker (
 }\r
 \r
 /**\r
 }\r
 \r
 /**\r

-  Registers a PCI device so PCI configuration registers may be accessed after \r
+  Registers a PCI device so PCI configuration registers may be accessed after\r

   SetVirtualAddressMap().\r
   SetVirtualAddressMap().\r

-  \r
-  Registers the PCI device specified by Address so all the PCI configuration registers \r
+\r
+  Registers the PCI device specified by Address so all the PCI configuration registers\r

   associated with that PCI device may be accessed after SetVirtualAddressMap() is called.\r
   associated with that PCI device may be accessed after SetVirtualAddressMap() is called.\r

-  \r
+\r

   If Address > 0x0FFFFFFF, then ASSERT().\r
 \r
   @param  Address The address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
   If Address > 0x0FFFFFFF, then ASSERT().\r
 \r
   @param  Address The address that encodes the PCI Bus, Device, Function and\r
                   Register.\r

-  \r
+\r

   @retval RETURN_SUCCESS           The PCI device was registered for runtime access.\r
   @retval RETURN_SUCCESS           The PCI device was registered for runtime access.\r

-  @retval RETURN_UNSUPPORTED       An attempt was made to call this function \r
+  @retval RETURN_UNSUPPORTED       An attempt was made to call this function\r

                                    after ExitBootServices().\r
   @retval RETURN_UNSUPPORTED       The resources required to access the PCI device\r
                                    at runtime could not be mapped.\r
                                    after ExitBootServices().\r
   @retval RETURN_UNSUPPORTED       The resources required to access the PCI device\r
                                    at runtime could not be mapped.\r


@@ -191,12 +182,12 @@ PciRegisterForRuntimeAccess (
 UINT8\r
 EFIAPI\r
 PciRead8 (\r
 UINT8\r
 EFIAPI\r
 PciRead8 (\r

-  IN      UINTN                     Address\r
+  IN      UINTN  Address\r

   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
 \r
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
 \r

-  return (UINT8) DxePciLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint8);\r
+  return (UINT8)DxePciLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint8);\r

 }\r
 \r
 /**\r
 }\r
 \r
 /**\r


@@ -218,13 +209,13 @@ PciRead8 (
 UINT8\r
 EFIAPI\r
 PciWrite8 (\r
 UINT8\r
 EFIAPI\r
 PciWrite8 (\r

-  IN      UINTN                     Address,\r
-  IN      UINT8                     Value\r
+  IN      UINTN  Address,\r
+  IN      UINT8  Value\r

   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
 \r
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
 \r

-  return (UINT8) DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint8, Value);\r
+  return (UINT8)DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint8, Value);\r

 }\r
 \r
 /**\r
 }\r
 \r
 /**\r


@@ -250,11 +241,11 @@ PciWrite8 (
 UINT8\r
 EFIAPI\r
 PciOr8 (\r
 UINT8\r
 EFIAPI\r
 PciOr8 (\r

-  IN      UINTN                     Address,\r
-  IN      UINT8                     OrData\r
+  IN      UINTN  Address,\r
+  IN      UINT8  OrData\r

   )\r
 {\r
   )\r
 {\r

-  return PciWrite8 (Address, (UINT8) (PciRead8 (Address) | OrData));\r
+  return PciWrite8 (Address, (UINT8)(PciRead8 (Address) | OrData));\r

 }\r
 \r
 /**\r
 }\r
 \r
 /**\r


@@ -280,11 +271,11 @@ PciOr8 (
 UINT8\r
 EFIAPI\r
 PciAnd8 (\r
 UINT8\r
 EFIAPI\r
 PciAnd8 (\r

-  IN      UINTN                     Address,\r
-  IN      UINT8                     AndData\r
+  IN      UINTN  Address,\r
+  IN      UINT8  AndData\r

   )\r
 {\r
   )\r
 {\r

-  return PciWrite8 (Address, (UINT8) (PciRead8 (Address) & AndData));\r
+  return PciWrite8 (Address, (UINT8)(PciRead8 (Address) & AndData));\r

 }\r
 \r
 /**\r
 }\r
 \r
 /**\r


@@ -312,12 +303,12 @@ PciAnd8 (
 UINT8\r
 EFIAPI\r
 PciAndThenOr8 (\r
 UINT8\r
 EFIAPI\r
 PciAndThenOr8 (\r

-  IN      UINTN                     Address,\r
-  IN      UINT8                     AndData,\r
-  IN      UINT8                     OrData\r
+  IN      UINTN  Address,\r
+  IN      UINT8  AndData,\r
+  IN      UINT8  OrData\r

   )\r
 {\r
   )\r
 {\r

-  return PciWrite8 (Address, (UINT8) ((PciRead8 (Address) & AndData) | OrData));\r
+  return PciWrite8 (Address, (UINT8)((PciRead8 (Address) & AndData) | OrData));\r

 }\r
 \r
 /**\r
 }\r
 \r
 /**\r


@@ -344,9 +335,9 @@ PciAndThenOr8 (
 UINT8\r
 EFIAPI\r
 PciBitFieldRead8 (\r
 UINT8\r
 EFIAPI\r
 PciBitFieldRead8 (\r

-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit\r
+  IN      UINTN  Address,\r
+  IN      UINTN  StartBit,\r
+  IN      UINTN  EndBit\r

   )\r
 {\r
   return BitFieldRead8 (PciRead8 (Address), StartBit, EndBit);\r
   )\r
 {\r
   return BitFieldRead8 (PciRead8 (Address), StartBit, EndBit);\r


@@ -364,6 +355,7 @@ PciBitFieldRead8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r

+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r

 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r


@@ -378,10 +370,10 @@ PciBitFieldRead8 (
 UINT8\r
 EFIAPI\r
 PciBitFieldWrite8 (\r
 UINT8\r
 EFIAPI\r
 PciBitFieldWrite8 (\r

-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT8                     Value\r
+  IN      UINTN  Address,\r
+  IN      UINTN  StartBit,\r
+  IN      UINTN  EndBit,\r
+  IN      UINT8  Value\r

   )\r
 {\r
   return PciWrite8 (\r
   )\r
 {\r
   return PciWrite8 (\r


@@ -405,6 +397,7 @@ PciBitFieldWrite8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r

+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r

 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r


@@ -419,10 +412,10 @@ PciBitFieldWrite8 (
 UINT8\r
 EFIAPI\r
 PciBitFieldOr8 (\r
 UINT8\r
 EFIAPI\r
 PciBitFieldOr8 (\r

-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT8                     OrData\r
+  IN      UINTN  Address,\r
+  IN      UINTN  StartBit,\r
+  IN      UINTN  EndBit,\r
+  IN      UINT8  OrData\r

   )\r
 {\r
   return PciWrite8 (\r
   )\r
 {\r
   return PciWrite8 (\r


@@ -446,6 +439,7 @@ PciBitFieldOr8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r

+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r

 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r


@@ -460,10 +454,10 @@ PciBitFieldOr8 (
 UINT8\r
 EFIAPI\r
 PciBitFieldAnd8 (\r
 UINT8\r
 EFIAPI\r
 PciBitFieldAnd8 (\r

-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT8                     AndData\r
+  IN      UINTN  Address,\r
+  IN      UINTN  StartBit,\r
+  IN      UINTN  EndBit,\r
+  IN      UINT8  AndData\r

   )\r
 {\r
   return PciWrite8 (\r
   )\r
 {\r
   return PciWrite8 (\r


@@ -489,6 +483,8 @@ PciBitFieldAnd8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r

+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r

 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r


@@ -504,11 +500,11 @@ PciBitFieldAnd8 (
 UINT8\r
 EFIAPI\r
 PciBitFieldAndThenOr8 (\r
 UINT8\r
 EFIAPI\r
 PciBitFieldAndThenOr8 (\r

-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT8                     AndData,\r
-  IN      UINT8                     OrData\r
+  IN      UINTN  Address,\r
+  IN      UINTN  StartBit,\r
+  IN      UINTN  EndBit,\r
+  IN      UINT8  AndData,\r
+  IN      UINT8  OrData\r

   )\r
 {\r
   return PciWrite8 (\r
   )\r
 {\r
   return PciWrite8 (\r


@@ -536,12 +532,12 @@ PciBitFieldAndThenOr8 (
 UINT16\r
 EFIAPI\r
 PciRead16 (\r
 UINT16\r
 EFIAPI\r
 PciRead16 (\r

-  IN      UINTN                     Address\r
+  IN      UINTN  Address\r

   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
 \r
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
 \r

-  return (UINT16) DxePciLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint16);\r
+  return (UINT16)DxePciLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint16);\r

 }\r
 \r
 /**\r
 }\r
 \r
 /**\r


@@ -564,13 +560,13 @@ PciRead16 (
 UINT16\r
 EFIAPI\r
 PciWrite16 (\r
 UINT16\r
 EFIAPI\r
 PciWrite16 (\r

-  IN      UINTN                     Address,\r
-  IN      UINT16                    Value\r
+  IN      UINTN   Address,\r
+  IN      UINT16  Value\r

   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
 \r
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
 \r

-  return (UINT16) DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint16, Value);\r
+  return (UINT16)DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint16, Value);\r

 }\r
 \r
 /**\r
 }\r
 \r
 /**\r


@@ -597,11 +593,11 @@ PciWrite16 (
 UINT16\r
 EFIAPI\r
 PciOr16 (\r
 UINT16\r
 EFIAPI\r
 PciOr16 (\r

-  IN      UINTN                     Address,\r
-  IN      UINT16                    OrData\r
+  IN      UINTN   Address,\r
+  IN      UINT16  OrData\r

   )\r
 {\r
   )\r
 {\r

-  return PciWrite16 (Address, (UINT16) (PciRead16 (Address) | OrData));\r
+  return PciWrite16 (Address, (UINT16)(PciRead16 (Address) | OrData));\r

 }\r
 \r
 /**\r
 }\r
 \r
 /**\r


@@ -628,11 +624,11 @@ PciOr16 (
 UINT16\r
 EFIAPI\r
 PciAnd16 (\r
 UINT16\r
 EFIAPI\r
 PciAnd16 (\r

-  IN      UINTN                     Address,\r
-  IN      UINT16                    AndData\r
+  IN      UINTN   Address,\r
+  IN      UINT16  AndData\r

   )\r
 {\r
   )\r
 {\r

-  return PciWrite16 (Address, (UINT16) (PciRead16 (Address) & AndData));\r
+  return PciWrite16 (Address, (UINT16)(PciRead16 (Address) & AndData));\r

 }\r
 \r
 /**\r
 }\r
 \r
 /**\r


@@ -661,12 +657,12 @@ PciAnd16 (
 UINT16\r
 EFIAPI\r
 PciAndThenOr16 (\r
 UINT16\r
 EFIAPI\r
 PciAndThenOr16 (\r

-  IN      UINTN                     Address,\r
-  IN      UINT16                    AndData,\r
-  IN      UINT16                    OrData\r
+  IN      UINTN   Address,\r
+  IN      UINT16  AndData,\r
+  IN      UINT16  OrData\r

   )\r
 {\r
   )\r
 {\r

-  return PciWrite16 (Address, (UINT16) ((PciRead16 (Address) & AndData) | OrData));\r
+  return PciWrite16 (Address, (UINT16)((PciRead16 (Address) & AndData) | OrData));\r

 }\r
 \r
 /**\r
 }\r
 \r
 /**\r


@@ -694,9 +690,9 @@ PciAndThenOr16 (
 UINT16\r
 EFIAPI\r
 PciBitFieldRead16 (\r
 UINT16\r
 EFIAPI\r
 PciBitFieldRead16 (\r

-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit\r
+  IN      UINTN  Address,\r
+  IN      UINTN  StartBit,\r
+  IN      UINTN  EndBit\r

   )\r
 {\r
   return BitFieldRead16 (PciRead16 (Address), StartBit, EndBit);\r
   )\r
 {\r
   return BitFieldRead16 (PciRead16 (Address), StartBit, EndBit);\r


@@ -715,6 +711,7 @@ PciBitFieldRead16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r

+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r

 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r


@@ -729,10 +726,10 @@ PciBitFieldRead16 (
 UINT16\r
 EFIAPI\r
 PciBitFieldWrite16 (\r
 UINT16\r
 EFIAPI\r
 PciBitFieldWrite16 (\r

-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT16                    Value\r
+  IN      UINTN   Address,\r
+  IN      UINTN   StartBit,\r
+  IN      UINTN   EndBit,\r
+  IN      UINT16  Value\r

   )\r
 {\r
   return PciWrite16 (\r
   )\r
 {\r
   return PciWrite16 (\r


@@ -757,6 +754,7 @@ PciBitFieldWrite16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r

+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r

 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r


@@ -771,10 +769,10 @@ PciBitFieldWrite16 (
 UINT16\r
 EFIAPI\r
 PciBitFieldOr16 (\r
 UINT16\r
 EFIAPI\r
 PciBitFieldOr16 (\r

-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT16                    OrData\r
+  IN      UINTN   Address,\r
+  IN      UINTN   StartBit,\r
+  IN      UINTN   EndBit,\r
+  IN      UINT16  OrData\r

   )\r
 {\r
   return PciWrite16 (\r
   )\r
 {\r
   return PciWrite16 (\r


@@ -799,6 +797,7 @@ PciBitFieldOr16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r

+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r

 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r


@@ -813,10 +812,10 @@ PciBitFieldOr16 (
 UINT16\r
 EFIAPI\r
 PciBitFieldAnd16 (\r
 UINT16\r
 EFIAPI\r
 PciBitFieldAnd16 (\r

-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT16                    AndData\r
+  IN      UINTN   Address,\r
+  IN      UINTN   StartBit,\r
+  IN      UINTN   EndBit,\r
+  IN      UINT16  AndData\r

   )\r
 {\r
   return PciWrite16 (\r
   )\r
 {\r
   return PciWrite16 (\r


@@ -843,6 +842,8 @@ PciBitFieldAnd16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r

+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r

 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r


@@ -858,11 +859,11 @@ PciBitFieldAnd16 (
 UINT16\r
 EFIAPI\r
 PciBitFieldAndThenOr16 (\r
 UINT16\r
 EFIAPI\r
 PciBitFieldAndThenOr16 (\r

-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT16                    AndData,\r
-  IN      UINT16                    OrData\r
+  IN      UINTN   Address,\r
+  IN      UINTN   StartBit,\r
+  IN      UINTN   EndBit,\r
+  IN      UINT16  AndData,\r
+  IN      UINT16  OrData\r

   )\r
 {\r
   return PciWrite16 (\r
   )\r
 {\r
   return PciWrite16 (\r


@@ -890,7 +891,7 @@ PciBitFieldAndThenOr16 (
 UINT32\r
 EFIAPI\r
 PciRead32 (\r
 UINT32\r
 EFIAPI\r
 PciRead32 (\r

-  IN      UINTN                     Address\r
+  IN      UINTN  Address\r

   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r


@@ -918,8 +919,8 @@ PciRead32 (
 UINT32\r
 EFIAPI\r
 PciWrite32 (\r
 UINT32\r
 EFIAPI\r
 PciWrite32 (\r

-  IN      UINTN                     Address,\r
-  IN      UINT32                    Value\r
+  IN      UINTN   Address,\r
+  IN      UINT32  Value\r

   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r


@@ -951,8 +952,8 @@ PciWrite32 (
 UINT32\r
 EFIAPI\r
 PciOr32 (\r
 UINT32\r
 EFIAPI\r
 PciOr32 (\r

-  IN      UINTN                     Address,\r
-  IN      UINT32                    OrData\r
+  IN      UINTN   Address,\r
+  IN      UINT32  OrData\r

   )\r
 {\r
   return PciWrite32 (Address, PciRead32 (Address) | OrData);\r
   )\r
 {\r
   return PciWrite32 (Address, PciRead32 (Address) | OrData);\r


@@ -982,8 +983,8 @@ PciOr32 (
 UINT32\r
 EFIAPI\r
 PciAnd32 (\r
 UINT32\r
 EFIAPI\r
 PciAnd32 (\r

-  IN      UINTN                     Address,\r
-  IN      UINT32                    AndData\r
+  IN      UINTN   Address,\r
+  IN      UINT32  AndData\r

   )\r
 {\r
   return PciWrite32 (Address, PciRead32 (Address) & AndData);\r
   )\r
 {\r
   return PciWrite32 (Address, PciRead32 (Address) & AndData);\r


@@ -1015,9 +1016,9 @@ PciAnd32 (
 UINT32\r
 EFIAPI\r
 PciAndThenOr32 (\r
 UINT32\r
 EFIAPI\r
 PciAndThenOr32 (\r

-  IN      UINTN                     Address,\r
-  IN      UINT32                    AndData,\r
-  IN      UINT32                    OrData\r
+  IN      UINTN   Address,\r
+  IN      UINT32  AndData,\r
+  IN      UINT32  OrData\r

   )\r
 {\r
   return PciWrite32 (Address, (PciRead32 (Address) & AndData) | OrData);\r
   )\r
 {\r
   return PciWrite32 (Address, (PciRead32 (Address) & AndData) | OrData);\r


@@ -1048,9 +1049,9 @@ PciAndThenOr32 (
 UINT32\r
 EFIAPI\r
 PciBitFieldRead32 (\r
 UINT32\r
 EFIAPI\r
 PciBitFieldRead32 (\r

-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit\r
+  IN      UINTN  Address,\r
+  IN      UINTN  StartBit,\r
+  IN      UINTN  EndBit\r

   )\r
 {\r
   return BitFieldRead32 (PciRead32 (Address), StartBit, EndBit);\r
   )\r
 {\r
   return BitFieldRead32 (PciRead32 (Address), StartBit, EndBit);\r


@@ -1069,6 +1070,7 @@ PciBitFieldRead32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r

+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r

 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r


@@ -1083,10 +1085,10 @@ PciBitFieldRead32 (
 UINT32\r
 EFIAPI\r
 PciBitFieldWrite32 (\r
 UINT32\r
 EFIAPI\r
 PciBitFieldWrite32 (\r

-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT32                    Value\r
+  IN      UINTN   Address,\r
+  IN      UINTN   StartBit,\r
+  IN      UINTN   EndBit,\r
+  IN      UINT32  Value\r

   )\r
 {\r
   return PciWrite32 (\r
   )\r
 {\r
   return PciWrite32 (\r


@@ -1111,6 +1113,7 @@ PciBitFieldWrite32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r

+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r

 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r


@@ -1125,10 +1128,10 @@ PciBitFieldWrite32 (
 UINT32\r
 EFIAPI\r
 PciBitFieldOr32 (\r
 UINT32\r
 EFIAPI\r
 PciBitFieldOr32 (\r

-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT32                    OrData\r
+  IN      UINTN   Address,\r
+  IN      UINTN   StartBit,\r
+  IN      UINTN   EndBit,\r
+  IN      UINT32  OrData\r

   )\r
 {\r
   return PciWrite32 (\r
   )\r
 {\r
   return PciWrite32 (\r


@@ -1153,6 +1156,7 @@ PciBitFieldOr32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r

+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r

 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r


@@ -1167,10 +1171,10 @@ PciBitFieldOr32 (
 UINT32\r
 EFIAPI\r
 PciBitFieldAnd32 (\r
 UINT32\r
 EFIAPI\r
 PciBitFieldAnd32 (\r

-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT32                    AndData\r
+  IN      UINTN   Address,\r
+  IN      UINTN   StartBit,\r
+  IN      UINTN   EndBit,\r
+  IN      UINT32  AndData\r

   )\r
 {\r
   return PciWrite32 (\r
   )\r
 {\r
   return PciWrite32 (\r


@@ -1197,6 +1201,8 @@ PciBitFieldAnd32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r

+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r

 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
 \r
   @param  Address   The PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r


@@ -1212,11 +1218,11 @@ PciBitFieldAnd32 (
 UINT32\r
 EFIAPI\r
 PciBitFieldAndThenOr32 (\r
 UINT32\r
 EFIAPI\r
 PciBitFieldAndThenOr32 (\r

-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT32                    AndData,\r
-  IN      UINT32                    OrData\r
+  IN      UINTN   Address,\r
+  IN      UINTN   StartBit,\r
+  IN      UINTN   EndBit,\r
+  IN      UINT32  AndData,\r
+  IN      UINT32  OrData\r

   )\r
 {\r
   return PciWrite32 (\r
   )\r
 {\r
   return PciWrite32 (\r


@@ -1251,12 +1257,12 @@ PciBitFieldAndThenOr32 (
 UINTN\r
 EFIAPI\r
 PciReadBuffer (\r
 UINTN\r
 EFIAPI\r
 PciReadBuffer (\r

-  IN      UINTN                     StartAddress,\r
-  IN      UINTN                     Size,\r
-  OUT     VOID                      *Buffer\r
+  IN      UINTN  StartAddress,\r
+  IN      UINTN  Size,\r
+  OUT     VOID   *Buffer\r

   )\r
 {\r
   )\r
 {\r

-  UINTN                             ReturnValue;\r
+  UINTN  ReturnValue;\r

 \r
   ASSERT_INVALID_PCI_ADDRESS (StartAddress, 0);\r
   ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);\r
 \r
   ASSERT_INVALID_PCI_ADDRESS (StartAddress, 0);\r
   ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);\r


@@ -1277,19 +1283,19 @@ PciReadBuffer (
     // Read a byte if StartAddress is byte aligned\r
     //\r
     *(volatile UINT8 *)Buffer = PciRead8 (StartAddress);\r
     // Read a byte if StartAddress is byte aligned\r
     //\r
     *(volatile UINT8 *)Buffer = PciRead8 (StartAddress);\r

-    StartAddress += sizeof (UINT8);\r
-    Size -= sizeof (UINT8);\r
-    Buffer = (UINT8*)Buffer + 1;\r
+    StartAddress             += sizeof (UINT8);\r
+    Size                     -= sizeof (UINT8);\r
+    Buffer                    = (UINT8 *)Buffer + 1;\r

   }\r
 \r
   }\r
 \r

-  if (Size >= sizeof (UINT16) && (StartAddress & BIT1) != 0) {\r
+  if ((Size >= sizeof (UINT16)) && ((StartAddress & BIT1) != 0)) {\r

     //\r
     // Read a word if StartAddress is word aligned\r
     //\r
     WriteUnaligned16 (Buffer, PciRead16 (StartAddress));\r
     StartAddress += sizeof (UINT16);\r
     //\r
     // Read a word if StartAddress is word aligned\r
     //\r
     WriteUnaligned16 (Buffer, PciRead16 (StartAddress));\r
     StartAddress += sizeof (UINT16);\r

-    Size -= sizeof (UINT16);\r
-    Buffer = (UINT16*)Buffer + 1;\r
+    Size         -= sizeof (UINT16);\r
+    Buffer        = (UINT16 *)Buffer + 1;\r

   }\r
 \r
   while (Size >= sizeof (UINT32)) {\r
   }\r
 \r
   while (Size >= sizeof (UINT32)) {\r


@@ -1298,8 +1304,8 @@ PciReadBuffer (
     //\r
     WriteUnaligned32 (Buffer, PciRead32 (StartAddress));\r
     StartAddress += sizeof (UINT32);\r
     //\r
     WriteUnaligned32 (Buffer, PciRead32 (StartAddress));\r
     StartAddress += sizeof (UINT32);\r

-    Size -= sizeof (UINT32);\r
-    Buffer = (UINT32*)Buffer + 1;\r
+    Size         -= sizeof (UINT32);\r
+    Buffer        = (UINT32 *)Buffer + 1;\r

   }\r
 \r
   if (Size >= sizeof (UINT16)) {\r
   }\r
 \r
   if (Size >= sizeof (UINT16)) {\r


@@ -1308,8 +1314,8 @@ PciReadBuffer (
     //\r
     WriteUnaligned16 (Buffer, PciRead16 (StartAddress));\r
     StartAddress += sizeof (UINT16);\r
     //\r
     WriteUnaligned16 (Buffer, PciRead16 (StartAddress));\r
     StartAddress += sizeof (UINT16);\r

-    Size -= sizeof (UINT16);\r
-    Buffer = (UINT16*)Buffer + 1;\r
+    Size         -= sizeof (UINT16);\r
+    Buffer        = (UINT16 *)Buffer + 1;\r

   }\r
 \r
   if (Size >= sizeof (UINT8)) {\r
   }\r
 \r
   if (Size >= sizeof (UINT8)) {\r


@@ -1349,12 +1355,12 @@ PciReadBuffer (
 UINTN\r
 EFIAPI\r
 PciWriteBuffer (\r
 UINTN\r
 EFIAPI\r
 PciWriteBuffer (\r

-  IN      UINTN                     StartAddress,\r
-  IN      UINTN                     Size,\r
-  IN      VOID                      *Buffer\r
+  IN      UINTN  StartAddress,\r
+  IN      UINTN  Size,\r
+  IN      VOID   *Buffer\r

   )\r
 {\r
   )\r
 {\r

-  UINTN                             ReturnValue;\r
+  UINTN  ReturnValue;\r

 \r
   ASSERT_INVALID_PCI_ADDRESS (StartAddress, 0);\r
   ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);\r
 \r
   ASSERT_INVALID_PCI_ADDRESS (StartAddress, 0);\r
   ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);\r


@@ -1374,20 +1380,20 @@ PciWriteBuffer (
     //\r
     // Write a byte if StartAddress is byte aligned\r
     //\r
     //\r
     // Write a byte if StartAddress is byte aligned\r
     //\r

-    PciWrite8 (StartAddress, *(UINT8*)Buffer);\r
+    PciWrite8 (StartAddress, *(UINT8 *)Buffer);\r

     StartAddress += sizeof (UINT8);\r
     StartAddress += sizeof (UINT8);\r

-    Size -= sizeof (UINT8);\r
-    Buffer = (UINT8*)Buffer + 1;\r
+    Size         -= sizeof (UINT8);\r
+    Buffer        = (UINT8 *)Buffer + 1;\r

   }\r
 \r
   }\r
 \r

-  if (Size >= sizeof (UINT16) && (StartAddress & BIT1) != 0) {\r
+  if ((Size >= sizeof (UINT16)) && ((StartAddress & BIT1) != 0)) {\r

     //\r
     // Write a word if StartAddress is word aligned\r
     //\r
     PciWrite16 (StartAddress, ReadUnaligned16 (Buffer));\r
     StartAddress += sizeof (UINT16);\r
     //\r
     // Write a word if StartAddress is word aligned\r
     //\r
     PciWrite16 (StartAddress, ReadUnaligned16 (Buffer));\r
     StartAddress += sizeof (UINT16);\r

-    Size -= sizeof (UINT16);\r
-    Buffer = (UINT16*)Buffer + 1;\r
+    Size         -= sizeof (UINT16);\r
+    Buffer        = (UINT16 *)Buffer + 1;\r

   }\r
 \r
   while (Size >= sizeof (UINT32)) {\r
   }\r
 \r
   while (Size >= sizeof (UINT32)) {\r


@@ -1396,8 +1402,8 @@ PciWriteBuffer (
     //\r
     PciWrite32 (StartAddress, ReadUnaligned32 (Buffer));\r
     StartAddress += sizeof (UINT32);\r
     //\r
     PciWrite32 (StartAddress, ReadUnaligned32 (Buffer));\r
     StartAddress += sizeof (UINT32);\r

-    Size -= sizeof (UINT32);\r
-    Buffer = (UINT32*)Buffer + 1;\r
+    Size         -= sizeof (UINT32);\r
+    Buffer        = (UINT32 *)Buffer + 1;\r

   }\r
 \r
   if (Size >= sizeof (UINT16)) {\r
   }\r
 \r
   if (Size >= sizeof (UINT16)) {\r


@@ -1406,15 +1412,15 @@ PciWriteBuffer (
     //\r
     PciWrite16 (StartAddress, ReadUnaligned16 (Buffer));\r
     StartAddress += sizeof (UINT16);\r
     //\r
     PciWrite16 (StartAddress, ReadUnaligned16 (Buffer));\r
     StartAddress += sizeof (UINT16);\r

-    Size -= sizeof (UINT16);\r
-    Buffer = (UINT16*)Buffer + 1;\r
+    Size         -= sizeof (UINT16);\r
+    Buffer        = (UINT16 *)Buffer + 1;\r

   }\r
 \r
   if (Size >= sizeof (UINT8)) {\r
     //\r
     // Write the last remaining byte if exist\r
     //\r
   }\r
 \r
   if (Size >= sizeof (UINT8)) {\r
     //\r
     // Write the last remaining byte if exist\r
     //\r

-    PciWrite8 (StartAddress, *(UINT8*)Buffer);\r
+    PciWrite8 (StartAddress, *(UINT8 *)Buffer);\r

   }\r
 \r
   return ReturnValue;\r
   }\r
 \r
   return ReturnValue;\r