Update the copyright notice format

[mirror_edk2.git] / MdePkg / Library / UefiPciLibPciRootBridgeIo / PciLib.c

diff --git a/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c b/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c
index 5a43f66f860786ab5d28db3c6ee32adb39896841..ba51019a77a67f26dec0a687bb8bf8580006bf40 100644 (file)
--- a/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c
+++ b/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c
@@ -1,8 +1,8 @@
 /** @file\r
   PCI Library using PCI Root Bridge I/O Protocol.\r
 \r
-  Copyright (c) 2007 - 2008, Intel Corporation All rights\r
-  reserved. This program and the accompanying materials are\r
+  Copyright (c) 2007 - 2009, Intel Corporation. All rights reserved.<BR>\r
+  This program and the accompanying materials are\r
   licensed and made available under the terms and conditions of\r
   the BSD License which accompanies this distribution.  The full\r
   text of the license may be found at\r
@@ -143,9 +143,12 @@ DxePciLibPciRootBridgeIoWriteWorker (
 }\r
 \r
 /**\r
-  Register a PCI device so PCI configuration registers may be accessed after \r
+  Registers a PCI device so PCI configuration registers may be accessed after \r
   SetVirtualAddressMap().\r
   \r
+  Registers the PCI device specified by Address so all the PCI configuration registers \r
+  associated with that PCI device may be accessed after SetVirtualAddressMap() is called.\r
+  \r
   If Address > 0x0FFFFFFF, then ASSERT().\r
 \r
   @param  Address Address that encodes the PCI Bus, Device, Function and\r
@@ -166,6 +169,7 @@ PciRegisterForRuntimeAccess (
   IN UINTN  Address\r
   )\r
 {\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
   return RETURN_UNSUPPORTED;\r
 }\r
 \r
@@ -181,7 +185,7 @@ PciRegisterForRuntimeAccess (
   @param  Address Address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
 \r
-  @return The value read from the PCI configuration register.\r
+  @return The read value from the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -206,7 +210,7 @@ PciRead8 (
 \r
   @param  Address Address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
-  @param  Data    The value to write.\r
+  @param  Value   The value to write.\r
 \r
   @return The value written to the PCI configuration register.\r
 \r
@@ -215,12 +219,12 @@ UINT8
 EFIAPI\r
 PciWrite8 (\r
   IN      UINTN                     Address,\r
-  IN      UINT8                     Data\r
+  IN      UINT8                     Value\r
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
 \r
-  return (UINT8) DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint8, Data);\r
+  return (UINT8) DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint8, Value);\r
 }\r
 \r
 /**\r
@@ -526,7 +530,7 @@ PciBitFieldAndThenOr8 (
   @param  Address Address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
 \r
-  @return The value read from the PCI configuration register.\r
+  @return The read value from the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -552,7 +556,7 @@ PciRead16 (
 \r
   @param  Address Address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
-  @param  Data    The value to write.\r
+  @param  Value   The value to write.\r
 \r
   @return The value written to the PCI configuration register.\r
 \r
@@ -561,12 +565,12 @@ UINT16
 EFIAPI\r
 PciWrite16 (\r
   IN      UINTN                     Address,\r
-  IN      UINT16                    Data\r
+  IN      UINT16                    Value\r
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
 \r
-  return (UINT16) DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint16, Data);\r
+  return (UINT16) DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint16, Value);\r
 }\r
 \r
 /**\r
@@ -880,7 +884,7 @@ PciBitFieldAndThenOr16 (
   @param  Address Address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
 \r
-  @return The value read from the PCI configuration register.\r
+  @return The read value from the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -906,7 +910,7 @@ PciRead32 (
 \r
   @param  Address Address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
-  @param  Data    The value to write.\r
+  @param  Value   The value to write.\r
 \r
   @return The value written to the PCI configuration register.\r
 \r
@@ -915,12 +919,12 @@ UINT32
 EFIAPI\r
 PciWrite32 (\r
   IN      UINTN                     Address,\r
-  IN      UINT32                    Data\r
+  IN      UINT32                    Value\r
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
 \r
-  return DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint32, Data);\r
+  return DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint32, Value);\r
 }\r
 \r
 /**\r
@@ -1282,7 +1286,7 @@ PciReadBuffer (
     //\r
     // Read a word if StartAddress is word aligned\r
     //\r
-    *(volatile UINT16 *)Buffer = PciRead16 (StartAddress);\r
+    WriteUnaligned16 (Buffer, PciRead16 (StartAddress));\r
     StartAddress += sizeof (UINT16);\r
     Size -= sizeof (UINT16);\r
     Buffer = (UINT16*)Buffer + 1;\r
@@ -1292,7 +1296,7 @@ PciReadBuffer (
     //\r
     // Read as many double words as possible\r
     //\r
-    *(volatile UINT32 *)Buffer = PciRead32 (StartAddress);\r
+    WriteUnaligned32 (Buffer, PciRead32 (StartAddress));\r
     StartAddress += sizeof (UINT32);\r
     Size -= sizeof (UINT32);\r
     Buffer = (UINT32*)Buffer + 1;\r
@@ -1302,7 +1306,7 @@ PciReadBuffer (
     //\r
     // Read the last remaining word if exist\r
     //\r
-    *(volatile UINT16 *)Buffer = PciRead16 (StartAddress);\r
+    WriteUnaligned16 (Buffer, PciRead16 (StartAddress));\r
     StartAddress += sizeof (UINT16);\r
     Size -= sizeof (UINT16);\r
     Buffer = (UINT16*)Buffer + 1;\r
@@ -1339,7 +1343,7 @@ PciReadBuffer (
   @param  Size          Size in bytes of the transfer.\r
   @param  Buffer        Pointer to a buffer containing the data to write.\r
 \r
-  @return Size\r
+  @return Size written to StartAddress.\r
 \r
 **/\r
 UINTN\r
@@ -1380,7 +1384,7 @@ PciWriteBuffer (
     //\r
     // Write a word if StartAddress is word aligned\r
     //\r
-    PciWrite16 (StartAddress, *(UINT16*)Buffer);\r
+    PciWrite16 (StartAddress, ReadUnaligned16 (Buffer));\r
     StartAddress += sizeof (UINT16);\r
     Size -= sizeof (UINT16);\r
     Buffer = (UINT16*)Buffer + 1;\r
@@ -1390,7 +1394,7 @@ PciWriteBuffer (
     //\r
     // Write as many double words as possible\r
     //\r
-    PciWrite32 (StartAddress, *(UINT32*)Buffer);\r
+    PciWrite32 (StartAddress, ReadUnaligned32 (Buffer));\r
     StartAddress += sizeof (UINT32);\r
     Size -= sizeof (UINT32);\r
     Buffer = (UINT32*)Buffer + 1;\r
@@ -1400,7 +1404,7 @@ PciWriteBuffer (
     //\r
     // Write the last remaining word if exist\r
     //\r
-    PciWrite16 (StartAddress, *(UINT16*)Buffer);\r
+    PciWrite16 (StartAddress, ReadUnaligned16 (Buffer));\r
     StartAddress += sizeof (UINT16);\r
     Size -= sizeof (UINT16);\r
     Buffer = (UINT16*)Buffer + 1;\r