--- /dev/null
+/** @file\r
+ This protocol manages the legacy memory regions between 0xc0000 - 0xfffff\r
+\r
+ Copyright (c) 2006, Intel Corporation \r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+ Module Name: LegacyInterrupt.h\r
+\r
+ @par Revision Reference:\r
+ This protocol is defined in Framework for EFI Compatibility Support Module spec\r
+ Version 0.96\r
+\r
+**/\r
+\r
+#ifndef _EFI_LEGACY_INTERRUPT_H_\r
+#define _EFI_LEGACY_INTERRUPT_H_\r
+\r
+#define EFI_LEGACY_INTERRUPT_PROTOCOL_GUID \\r
+ { \\r
+ 0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe } \\r
+ }\r
+\r
+typedef struct _EFI_LEGACY_INTERRUPT_PROTOCOL EFI_LEGACY_INTERRUPT_PROTOCOL;\r
+\r
+/**\r
+ Get the number of PIRQs this hardware supports.\r
+\r
+ @param This Protocol instance pointer.\r
+ @param NumberPirsq Number of PIRQs.\r
+\r
+ @retval EFI_SUCCESS Number of PIRQs returned.\r
+\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_LEGACY_INTERRUPT_GET_NUMBER_PIRQS) (\r
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,\r
+ OUT UINT8 *NumberPirqs\r
+ );\r
+\r
+/**\r
+ Gets the PCI location associated with this protocol.\r
+\r
+ @param This Protocol instance pointer.\r
+ @param Bus PCI Bus\r
+ @param Device PCI Device\r
+ @param Function PCI Function\r
+\r
+ @retval EFI_SUCCESS Bus/Device/Function returned\r
+\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_LEGACY_INTERRUPT_GET_LOCATION) (\r
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,\r
+ OUT UINT8 *Bus,\r
+ OUT UINT8 *Device,\r
+ OUT UINT8 *Function\r
+ );\r
+\r
+/**\r
+ Read the PIRQ register and return the data\r
+\r
+ @param This Protocol instance pointer.\r
+ @param PirqNumber PIRQ register to read\r
+ @param PirqData Data read\r
+\r
+ @retval EFI_SUCCESS Data was read\r
+ @retval EFI_INVALID_PARAMETER Invalid PIRQ number\r
+\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_LEGACY_INTERRUPT_READ_PIRQ) (\r
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,\r
+ IN UINT8 PirqNumber,\r
+ OUT UINT8 *PirqData\r
+ );\r
+\r
+/**\r
+ Write the specified PIRQ register with the given data.\r
+\r
+ @param This Protocol instance pointer.\r
+ @param PirqNumber PIRQ register to read.\r
+ @param PirqData Data written.\r
+\r
+ @retval EFI_SUCCESS Table pointer returned\r
+ @retval EFI_INVALID_PARAMETER Invalid PIRQ number\r
+\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_LEGACY_INTERRUPT_WRITE_PIRQ) (\r
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,\r
+ IN UINT8 PirqNumber,\r
+ IN UINT8 PirqData\r
+ );\r
+\r
+/**\r
+ @par Protocol Description:\r
+ Abstracts the PIRQ programming from the generic EFI Compatibility Support Modules\r
+\r
+ @param GetNumberPirqs\r
+ Gets the number of PIRQs supported.\r
+\r
+ @param GetLocation\r
+ Gets the PCI bus, device, and function that associated with this protocol. \r
+\r
+ @param ReadPirq\r
+ Reads the indicated PIRQ register.\r
+\r
+ @param WritePirq\r
+ Writes to the indicated PIRQ register. \r
+\r
+**/\r
+struct _EFI_LEGACY_INTERRUPT_PROTOCOL {\r
+ EFI_LEGACY_INTERRUPT_GET_NUMBER_PIRQS GetNumberPirqs;\r
+ EFI_LEGACY_INTERRUPT_GET_LOCATION GetLocation;\r
+ EFI_LEGACY_INTERRUPT_READ_PIRQ ReadPirq;\r
+ EFI_LEGACY_INTERRUPT_WRITE_PIRQ WritePirq;\r
+};\r
+\r
+extern EFI_GUID gEfiLegacyInterruptProtocolGuid;\r
+\r
+#endif\r