Program SD Cards into 4-bit mode (support for this is required in the spec). This...

[mirror_edk2.git] / Omap35xxPkg / InterruptDxe / HardwareInterrupt.c

diff --git a/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c b/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c
index eae92067d67dd15b91840e09437bd85bafaa081a..0ddedb4c79c744fe547dece709cb6fbbd94e4500 100644 (file)
--- a/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c
+++ b/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c
@@ -1,9 +1,9 @@
 /** @file\r
   Handle OMAP35xx interrupt controller \r
 \r
-  Copyright (c) 2008-2010, Apple Inc. All rights reserved.\r
+  Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
   \r
-  All rights reserved. This program and the accompanying materials\r
+  This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
   http://opensource.org/licenses/bsd-license.php\r
@@ -59,6 +59,8 @@ ExitBootServicesEvent (
   MmioWrite32 (INTCPS_MIR(1), 0xFFFFFFFF);\r
   MmioWrite32 (INTCPS_MIR(2), 0xFFFFFFFF);\r
   MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);\r
+\r
+  // Add code here to disable all FIQs as debugger may have turned one on\r
 }\r
 \r
 /**\r
@@ -85,6 +87,14 @@ RegisterInterruptSource (
     return EFI_UNSUPPORTED;\r
   } \r
   \r
+  if ((MmioRead32 (INTCPS_ILR(Source)) & INTCPS_ILR_FIQ) == INTCPS_ILR_FIQ) {\r
+    // This vector has been programmed as FIQ so we can't use it for IRQ\r
+    // EFI does not use FIQ, but the debugger can use it to check for \r
+    // ctrl-c. So this ASSERT means you have a conflict with the debug agent\r
+    ASSERT (FALSE);\r
+    return EFI_UNSUPPORTED;\r
+  }\r
+  \r
   if ((Handler == NULL) && (gRegisteredInterruptHandlers[Source] == NULL)) {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
@@ -345,7 +355,7 @@ InterruptDxeInitialize (
   MmioWrite32 (INTCPS_MIR(0), 0xFFFFFFFF);\r
   MmioWrite32 (INTCPS_MIR(1), 0xFFFFFFFF);\r
   MmioWrite32 (INTCPS_MIR(2), 0xFFFFFFFF);\r
-  MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);\r
+  MmioOr32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);\r
  \r
   Status = gBS->InstallMultipleProtocolInterfaces(&gHardwareInterruptHandle,\r
                                                   &gHardwareInterruptProtocolGuid,   &gHardwareInterruptProtocol,\r