Added DebugAgentTimerLib. Cleaned up .h files and other code.

[mirror_edk2.git] / Omap35xxPkg / Library / DebugAgentTimerLib / DebugAgentTimerLib.c

diff --git a/Omap35xxPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c b/Omap35xxPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c
new file mode 100755 (executable)
index 0000000..72b8603
--- /dev/null
+++ b/Omap35xxPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c
@@ -0,0 +1,158 @@
+/** @file\r
+  Debug Agent timer lib for OMAP 35xx.\r
+\r
+  Copyright (c) 2008-2010, Apple Inc. All rights reserved.\r
+  \r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+#include <Base.h>\r
+#include <Library/BaseLib.h>
+#include <Library/IoLib.h>
+#include <Library/OmapLib.h>
+#include <Library/ArmLib.h>\r
+#include <Library/PcdLib.h>
+\r
+#include <Omap3530/Omap3530.h>
+\r
+\r
+volatile UINT32 gVector;\r
+
+// Cached registers
+volatile UINT32 gTISR;
+volatile UINT32 gTCLR;
+volatile UINT32 gTLDR;
+volatile UINT32 gTCRR;
+volatile UINT32 gTIER;
+\r
+VOID\r
+EnableInterruptSource (\r
+  VOID\r
+  )\r
+{\r
+  UINTN Bank;\r
+  UINTN Bit;\r
+\r
+  // Map vector to FIQ, IRQ is default\r
+  MmioWrite32 (INTCPS_ILR (gVector), 1);\r
+\r
+  Bank = gVector / 32;\r
+  Bit  = 1UL << (gVector % 32);\r
+  \r
+  MmioWrite32 (INTCPS_MIR_CLEAR(Bank), Bit);\r
+}\r
+\r
+VOID\r
+DisableInterruptSource (\r
+  VOID\r
+  )\r
+{\r
+  UINTN Bank;\r
+  UINTN Bit;\r
+  \r
+  Bank = gVector / 32;\r
+  Bit  = 1UL << (gVector % 32);  \r
+\r
+  MmioWrite32 (INTCPS_MIR_SET(Bank), Bit);\r
+}\r
+\r
+\r
+\r
+/**\r
+  Setup all the hardware needed for the debug agents timer.\r
+\r
+  This function is used to set up debug enviroment. It may enable interrupts.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+DebugAgentTimerIntialize (\r
+  VOID\r
+  )\r
+{\r
+  UINT32      TimerBaseAddress;\r
+\r
+\r
+  gVector = InterruptVectorForTimer (PcdGet32(PcdOmap35xxDebugAgentTimer));
+\r
+  // Set up the timer registers
+  TimerBaseAddress = TimerBase (PcdGet32(PcdOmap35xxDebugAgentTimer));
+  gTISR = TimerBaseAddress + GPTIMER_TISR;
+  gTCLR = TimerBaseAddress + GPTIMER_TCLR;
+  gTLDR = TimerBaseAddress + GPTIMER_TLDR;
+  gTCRR = TimerBaseAddress + GPTIMER_TCRR;
+  gTIER = TimerBaseAddress + GPTIMER_TIER;
+\r
+  DisableInterruptSource ();\r
+}\r
+  \r
+  \r
+/**\r
+  Set the period for the debug agent timer. Zero means disable the timer.\r
+\r
+  @param[in] TimerPeriodMilliseconds    Frequency of the debug agent timer.\r
+\r
+**/  \r
+VOID\r
+EFIAPI\r
+DebugAgentTimerSetPeriod (\r
+  IN  UINT32  TimerPeriodMilliseconds\r
+  )\r
+{\r
+  UINT64      TimerCount;
+  INT32       LoadValue;
+  
+  if (TimerPeriodMilliseconds == 0) {
+    // Turn off GPTIMER3
+    MmioWrite32 (gTCLR, TCLR_ST_OFF);
+    
+    DisableInterruptSource ();
+  } else {  
+    // Calculate required timer count
+    TimerCount = DivU64x32(TimerPeriodMilliseconds * 1000000, PcdGet32(PcdDebugAgentTimerFreqNanoSeconds));
+
+    // Set GPTIMER5 Load register
+    LoadValue = (INT32) -TimerCount;
+    MmioWrite32 (gTLDR, LoadValue);
+    MmioWrite32 (gTCRR, LoadValue);
+
+    // Enable Overflow interrupt
+    MmioWrite32 (gTIER, TIER_TCAR_IT_DISABLE | TIER_OVF_IT_ENABLE | TIER_MAT_IT_DISABLE);
+
+    // Turn on GPTIMER3, it will reload at overflow
+    MmioWrite32 (gTCLR, TCLR_AR_AUTORELOAD | TCLR_ST_ON);
+
+    EnableInterruptSource ();
+  }
+}\r
+  \r
+\r
+/**\r
+  Perform End Of Interrupt for the debug agent timer. This is called in the \r
+  interrupt handler after the interrupt has been processed. \r
+\r
+**/  \r
+VOID\r
+EFIAPI\r
+DebugAgentTimerEndOfInterrupt (\r
+  VOID\r
+  )\r
+{\r
+   // Clear all timer interrupts
+  MmioWrite32 (gTISR, TISR_CLEAR_ALL);  
+
+  // Poll interrupt status bits to ensure clearing
+  while ((MmioRead32 (gTISR) & TISR_ALL_INTERRUPT_MASK) != TISR_NO_INTERRUPTS_PENDING);\r
+\r
+  MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWFIQAGR);\r
+  ArmDataSyncronizationBarrier ();\r
+\r
+}\r
+  \r
+  
\ No newline at end of file