/** @file\r
\r
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
- \r
+\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
#define EFI_PCI_IO_PRIVATE_DATA_SIGNATURE SIGNATURE_32('p', 'c', 'i', 'o')\r
#define EFI_PCI_IO_PRIVATE_DATA_FROM_THIS(a) CR(a, EFI_PCI_IO_PRIVATE_DATA, PciIoProtocol, EFI_PCI_IO_PRIVATE_DATA_SIGNATURE)\r
\r
-EFI_PCI_IO_DEVICE_PATH PciIoDevicePathTemplate = \r
+EFI_PCI_IO_DEVICE_PATH PciIoDevicePathTemplate =\r
{\r
{\r
{ ACPI_DEVICE_PATH, ACPI_DP, { sizeof (ACPI_HID_DEVICE_PATH), 0 } },\r
\r
// Get the Power IC protocol\r
Status = gBS->LocateProtocol (&gEmbeddedExternalDeviceProtocolGuid, NULL, (VOID **)&gTPS65950);\r
- ASSERT_EFI_ERROR (Status); \r
+ ASSERT_EFI_ERROR (Status);\r
\r
// Power the USB PHY\r
Data = VAUX_DEV_GRP_P1;\r
\r
Data = VAUX_DEDICATED_18V;\r
Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VAUX2_DEDICATED), 1, &Data);\r
- ASSERT_EFI_ERROR (Status); \r
+ ASSERT_EFI_ERROR (Status);\r
\r
// Enable power to the USB hub\r
Status = gTPS65950->Read (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID3, LEDEN), 1, &Data);\r
{\r
EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS(This);\r
\r
- return PciRootBridgeIoMemRead (&Private->RootBridge.Io, \r
+ return PciRootBridgeIoMemRead (&Private->RootBridge.Io,\r
(EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,\r
Private->ConfigSpace->Device.Bar[BarIndex] + Offset,\r
Count,\r
{\r
EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS(This);\r
\r
- return PciRootBridgeIoMemWrite (&Private->RootBridge.Io, \r
+ return PciRootBridgeIoMemWrite (&Private->RootBridge.Io,\r
(EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,\r
Private->ConfigSpace->Device.Bar[BarIndex] + Offset,\r
Count,\r
return EFI_UNSUPPORTED;\r
}\r
\r
+/**\r
+ Enable a PCI driver to read PCI controller registers in PCI configuration space.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
+ @param[in] Width Signifies the width of the memory operations.\r
+ @param[in] Offset The offset within the PCI configuration space for\r
+ the PCI controller.\r
+ @param[in] Count The number of PCI configuration operations to\r
+ perform. Bytes moved is Width size * Count,\r
+ starting at Offset.\r
+\r
+ @param[in out] Buffer The destination buffer to store the results.\r
+\r
+ @retval EFI_SUCCESS The data was read from the PCI controller.\r
+ @retval EFI_INVALID_PARAMETER "Width" is invalid.\r
+ @retval EFI_INVALID_PARAMETER "Buffer" is NULL.\r
+\r
+**/\r
EFI_STATUS\r
PciIoPciRead (\r
- IN EFI_PCI_IO_PROTOCOL *This,\r
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,\r
- IN UINT32 Offset,\r
- IN UINTN Count,\r
- IN OUT VOID *Buffer\r
+ IN EFI_PCI_IO_PROTOCOL *This,\r
+ IN EFI_PCI_IO_PROTOCOL_WIDTH Width,\r
+ IN UINT32 Offset,\r
+ IN UINTN Count,\r
+ IN OUT VOID *Buffer\r
)\r
{\r
- EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS(This);\r
+ EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This);\r
+ EFI_STATUS Status;\r
+\r
+ if ((Width < 0) || (Width >= EfiPciIoWidthMaximum) || (Buffer == NULL)) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ Status = PciRootBridgeIoMemRW (\r
+ (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)Width,\r
+ Count,\r
+ TRUE,\r
+ (PTR)(UINTN)Buffer,\r
+ TRUE,\r
+ (PTR)(UINTN)(((UINT8 *)Private->ConfigSpace) + Offset) //Fix me ConfigSpace\r
+ );\r
\r
- return PciRootBridgeIoMemRW ((EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)Width, \r
- Count, \r
- TRUE, \r
- (PTR)(UINTN)Buffer, \r
- TRUE, \r
- (PTR)(UINTN)(((UINT8 *)Private->ConfigSpace) + Offset)\r
- );\r
+ return Status;\r
}\r
\r
+/**\r
+ Enable a PCI driver to write PCI controller registers in PCI configuration space.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
+ @param[in] Width Signifies the width of the memory operations.\r
+ @param[in] Offset The offset within the PCI configuration space for\r
+ the PCI controller.\r
+ @param[in] Count The number of PCI configuration operations to\r
+ perform. Bytes moved is Width size * Count,\r
+ starting at Offset.\r
+\r
+ @param[in out] Buffer The source buffer to write data from.\r
+\r
+ @retval EFI_SUCCESS The data was read from the PCI controller.\r
+ @retval EFI_INVALID_PARAMETER "Width" is invalid.\r
+ @retval EFI_INVALID_PARAMETER "Buffer" is NULL.\r
+\r
+**/\r
EFI_STATUS\r
PciIoPciWrite (\r
IN EFI_PCI_IO_PROTOCOL *This,\r
IN OUT VOID *Buffer\r
)\r
{\r
- EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS(This);\r
+ EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This);\r
+\r
+ if ((Width < 0) || (Width >= EfiPciIoWidthMaximum) || (Buffer == NULL)) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
\r
- return PciRootBridgeIoMemRW ((EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, \r
- Count, \r
- TRUE, \r
- (PTR)(UINTN)(((UINT8 *)Private->ConfigSpace) + Offset), \r
- TRUE, \r
+ return PciRootBridgeIoMemRW ((EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,\r
+ Count,\r
+ TRUE,\r
+ (PTR)(UINTN)(((UINT8 *)Private->ConfigSpace) + Offset),\r
+ TRUE,\r
(PTR)(UINTN)Buffer\r
);\r
}\r
return DmaUnmap (Mapping);\r
}\r
\r
+/**\r
+ Allocate pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer\r
+ mapping.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
+ @param[in] Type This parameter is not used and must be ignored.\r
+ @param[in] MemoryType The type of memory to allocate, EfiBootServicesData or\r
+ EfiRuntimeServicesData.\r
+ @param[in] Pages The number of pages to allocate.\r
+ @param[out] HostAddress A pointer to store the base system memory address of\r
+ the allocated range.\r
+ @param[in] Attributes The requested bit mask of attributes for the allocated\r
+ range. Only the attributes,\r
+ EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE and\r
+ EFI_PCI_ATTRIBUTE_MEMORY_CACHED may be used with this\r
+ function. If any other bits are set, then EFI_UNSUPPORTED\r
+ is returned. This function ignores this bit mask.\r
+\r
+ @retval EFI_SUCCESS The requested memory pages were allocated.\r
+ @retval EFI_INVALID_PARAMETER HostAddress is NULL.\r
+ @retval EFI_INVALID_PARAMETER MemoryType is invalid.\r
+ @retval EFI_UNSUPPORTED Attributes is unsupported.\r
+ @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.\r
+\r
+**/\r
EFI_STATUS\r
PciIoAllocateBuffer (\r
- IN EFI_PCI_IO_PROTOCOL *This,\r
- IN EFI_ALLOCATE_TYPE Type,\r
- IN EFI_MEMORY_TYPE MemoryType,\r
- IN UINTN Pages,\r
- OUT VOID **HostAddress,\r
- IN UINT64 Attributes\r
+ IN EFI_PCI_IO_PROTOCOL *This,\r
+ IN EFI_ALLOCATE_TYPE Type,\r
+ IN EFI_MEMORY_TYPE MemoryType,\r
+ IN UINTN Pages,\r
+ OUT VOID **HostAddress,\r
+ IN UINT64 Attributes\r
)\r
{\r
- if (Attributes & EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER) {\r
- // Check this\r
+ if (Attributes &\r
+ (~(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE |\r
+ EFI_PCI_ATTRIBUTE_MEMORY_CACHED ))) {\r
return EFI_UNSUPPORTED;\r
}\r
\r
return EFI_SUCCESS;\r
}\r
\r
+/**\r
+ Retrieves this PCI controller's current PCI bus number, device number, and function number.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
+ @param[out] SegmentNumber The PCI controller's current PCI segment number.\r
+ @param[out] BusNumber The PCI controller's current PCI bus number.\r
+ @param[out] DeviceNumber The PCI controller's current PCI device number.\r
+ @param[out] FunctionNumber The PCI controller’s current PCI function number.\r
+\r
+ @retval EFI_SUCCESS The PCI controller location was returned.\r
+ @retval EFI_INVALID_PARAMETER At least one out of the four output parameters is\r
+ a NULL pointer.\r
+**/\r
EFI_STATUS\r
PciIoGetLocation (\r
- IN EFI_PCI_IO_PROTOCOL *This,\r
- OUT UINTN *SegmentNumber,\r
- OUT UINTN *BusNumber,\r
- OUT UINTN *DeviceNumber,\r
- OUT UINTN *FunctionNumber\r
+ IN EFI_PCI_IO_PROTOCOL *This,\r
+ OUT UINTN *SegmentNumber,\r
+ OUT UINTN *BusNumber,\r
+ OUT UINTN *DeviceNumber,\r
+ OUT UINTN *FunctionNumber\r
)\r
{\r
- EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS(This);\r
+ EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This);\r
\r
- if (SegmentNumber != NULL) {\r
- *SegmentNumber = Private->Segment;\r
- }\r
-\r
- if (BusNumber != NULL) {\r
- *BusNumber = 0xff;\r
- }\r
-\r
- if (DeviceNumber != NULL) {\r
- *DeviceNumber = 0;\r
+ if ((SegmentNumber == NULL) || (BusNumber == NULL) ||\r
+ (DeviceNumber == NULL) || (FunctionNumber == NULL) ) {\r
+ return EFI_INVALID_PARAMETER;\r
}\r
\r
- if (FunctionNumber != NULL) {\r
- *FunctionNumber = 0;\r
- }\r
+ *SegmentNumber = Private->Segment;\r
+ *BusNumber = 0xff;\r
+ *DeviceNumber = 0;\r
+ *FunctionNumber = 0;\r
\r
return EFI_SUCCESS;\r
}\r
\r
+/**\r
+ Performs an operation on the attributes that this PCI controller supports.\r
+\r
+ The operations include getting the set of supported attributes, retrieving\r
+ the current attributes, setting the current attributes, enabling attributes,\r
+ and disabling attributes.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
+ @param[in] Operation The operation to perform on the attributes for this\r
+ PCI controller.\r
+ @param[in] Attributes The mask of attributes that are used for Set,\r
+ Enable and Disable operations.\r
+ @param[out] Result A pointer to the result mask of attributes that are\r
+ returned for the Get and Supported operations. This\r
+ is an optional parameter that may be NULL for the\r
+ Set, Enable, and Disable operations.\r
+\r
+ @retval EFI_SUCCESS The operation on the PCI controller's\r
+ attributes was completed. If the operation\r
+ was Get or Supported, then the attribute mask\r
+ is returned in Result.\r
+ @retval EFI_INVALID_PARAMETER Operation is greater than or equal to\r
+ EfiPciIoAttributeOperationMaximum.\r
+ @retval EFI_INVALID_PARAMETER Operation is Get and Result is NULL.\r
+ @retval EFI_INVALID_PARAMETER Operation is Supported and Result is NULL.\r
+\r
+**/\r
EFI_STATUS\r
PciIoAttributes (\r
IN EFI_PCI_IO_PROTOCOL *This,\r
if (Result == NULL) {\r
return EFI_INVALID_PARAMETER;\r
}\r
+ //\r
// We are not a real PCI device so just say things we kind of do\r
- *Result = EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_BUS_MASTER | EFI_PCI_DEVICE_ENABLE;\r
+ //\r
+ *Result = EFI_PCI_DEVICE_ENABLE;\r
break;\r
\r
case EfiPciIoAttributeOperationSet:\r
case EfiPciIoAttributeOperationEnable:\r
case EfiPciIoAttributeOperationDisable:\r
+ if (Attributes & (~EFI_PCI_DEVICE_ENABLE)) {\r
+ return EFI_UNSUPPORTED;\r
+ }\r
// Since we are not a real PCI device no enable/set or disable operations exist.\r
return EFI_SUCCESS;\r
- \r
+\r
default:\r
- ASSERT (FALSE);\r
return EFI_INVALID_PARAMETER;\r
};\r
return EFI_SUCCESS;\r
return EFI_UNSUPPORTED;\r
}\r
\r
-EFI_PCI_IO_PROTOCOL PciIoTemplate = \r
+EFI_PCI_IO_PROTOCOL PciIoTemplate =\r
{\r
PciIoPollMem,\r
PciIoPollIo,\r
Status = EFI_OUT_OF_RESOURCES;\r
return Status;\r
}\r
- \r
+\r
Private->Signature = EFI_PCI_IO_PRIVATE_DATA_SIGNATURE; // Fill in signature\r
Private->RootBridge.Signature = PCI_ROOT_BRIDGE_SIGNATURE; // Fake Root Bridge structure needs a signature too\r
Private->RootBridge.MemoryStart = USB_EHCI_HCCAPBASE; // Get the USB capability register base\r
}\r
\r
// Configure PCI config space\r
- Private->ConfigSpace->Hdr.VendorId = 0x3530;\r
- Private->ConfigSpace->Hdr.DeviceId = 0x3530;\r
+ Private->ConfigSpace->Hdr.VendorId = 0xFFFF; // Invalid vendor Id as it is not an actual device.\r
+ Private->ConfigSpace->Hdr.DeviceId = 0x0000; // Not relevant as the vendor id is not valid.\r
Private->ConfigSpace->Hdr.ClassCode[0] = 0x20;\r
Private->ConfigSpace->Hdr.ClassCode[1] = 0x03;\r
Private->ConfigSpace->Hdr.ClassCode[2] = 0x0C;\r
// Unique device path.\r
CopyMem(&Private->DevicePath, &PciIoDevicePathTemplate, sizeof(PciIoDevicePathTemplate));\r
Private->DevicePath.AcpiDevicePath.UID = 0;\r
- \r
+\r
// Copy protocol structure\r
CopyMem(&Private->PciIoProtocol, &PciIoTemplate, sizeof(PciIoTemplate));\r
\r
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