Patch from open source community for CryptoPkg to allow it to build for ARM using...

[mirror_edk2.git] / OptionRomPkg / AtapiPassThruDxe / AtapiPassThru.c

diff --git a/OptionRomPkg/AtapiPassThruDxe/AtapiPassThru.c b/OptionRomPkg/AtapiPassThruDxe/AtapiPassThru.c
index 8e18910379b43e0d4075c64362ae1c12f6d95741..3578a1e4459c97cd13bf167e53c39cb78714c783 100644 (file)
--- a/OptionRomPkg/AtapiPassThruDxe/AtapiPassThru.c
+++ b/OptionRomPkg/AtapiPassThruDxe/AtapiPassThru.c
@@ -1,6 +1,6 @@
 /** @file\r
-  Copyright (c) 2006, Intel Corporation\r
-  All rights reserved. This program and the accompanying materials\r
+  Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
+  This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
   http://opensource.org/licenses/bsd-license.php\r
@@ -822,7 +822,7 @@ Returns:
     //\r
     // disable Interrupt\r
     //\r
-    DeviceControlValue |= bit (1);\r
+    DeviceControlValue |= BIT1;\r
     WritePortB (\r
       AtapiScsiPrivate->PciIo,\r
       AtapiScsiPrivate->IoPort->Alt.DeviceControl,\r
@@ -922,7 +922,7 @@ Returns:
   //\r
   // bit7 and bit5 are both set to 1 for backward compatibility\r
   //\r
-  DeviceSelect = (UINT8) (((bit (7) | bit (5)) | (Target << 4)));\r
+  DeviceSelect = (UINT8) (((BIT7 | BIT5) | (Target << 4)));\r
   WritePortB (AtapiScsiPrivate->PciIo, AtapiScsiPrivate->IoPort->Head, DeviceSelect);\r
 \r
   Command = ATAPI_SOFT_RESET_CMD;\r
@@ -1336,7 +1336,7 @@ Returns:
     //\r
     // disable Interrupt\r
     //\r
-    DeviceControlValue |= bit (1);\r
+    DeviceControlValue |= BIT1;\r
     WritePortB (\r
       AtapiScsiPrivate->PciIo,\r
       AtapiScsiPrivate->IoPort->Alt.DeviceControl,\r
@@ -1438,7 +1438,7 @@ Returns:
   //\r
   // bit7 and bit5 are both set to 1 for backward compatibility\r
   //\r
-  DeviceSelect = (UINT8) (((bit (7) | bit (5)) | (TargetId << 4)));\r
+  DeviceSelect = (UINT8) ((BIT7 | BIT5) | (TargetId << 4));\r
   WritePortB (AtapiScsiPrivate->PciIo, AtapiScsiPrivate->IoPort->Head, DeviceSelect);\r
 \r
   Command = ATAPI_SOFT_RESET_CMD;\r
@@ -1749,10 +1749,12 @@ Returns:
 {\r
   UINT8 Index;\r
   UINT8 *OpCode;\r
+  UINT8 ArrayLen;\r
 \r
   OpCode = (UINT8 *) (Packet->Cdb);\r
+  ArrayLen = (UINT8) (sizeof (gSupportedATAPICommands) / sizeof (gSupportedATAPICommands[0]));\r
 \r
-  for (Index = 0; CompareMem (&gSupportedATAPICommands[Index], &gEndTable, sizeof (SCSI_COMMAND_SET)); Index++) {\r
+  for (Index = 0; (Index < ArrayLen) && (CompareMem (&gSupportedATAPICommands[Index], &gEndTable, sizeof (SCSI_COMMAND_SET)) != 0); Index++) {\r
 \r
     if (*OpCode == gSupportedATAPICommands[Index].OpCode) {\r
       //\r
@@ -1990,10 +1992,12 @@ Returns:
 {\r
   UINT8 Index;\r
   UINT8 *OpCode;\r
+  UINT8 ArrayLen;\r
 \r
   OpCode = (UINT8 *) (Packet->Cdb);\r
+  ArrayLen = (UINT8) (sizeof (gSupportedATAPICommands) / sizeof (gSupportedATAPICommands[0]));\r
 \r
-  for (Index = 0; CompareMem (&gSupportedATAPICommands[Index], &gEndTable, sizeof (SCSI_COMMAND_SET)); Index++) {\r
+  for (Index = 0; (Index < ArrayLen) && (CompareMem (&gSupportedATAPICommands[Index], &gEndTable, sizeof (SCSI_COMMAND_SET)) != 0); Index++) {\r
 \r
     if (*OpCode == gSupportedATAPICommands[Index].OpCode) {\r
       //\r