OvmfPkg/AcpiTables/Dsdt.asl: report the PCI IO ranges set in FWDT

[mirror_edk2.git] / OvmfPkg / AcpiTables / Dsdt.asl

diff --git a/OvmfPkg/AcpiTables/Dsdt.asl b/OvmfPkg/AcpiTables/Dsdt.asl
index f7ae92b0b585bd2f1736354a94ec3baf62993191..0ef0d3d0a0ed4a59b4f8c3a5b7f69fa8951c0f31 100644 (file)
--- a/OvmfPkg/AcpiTables/Dsdt.asl
+++ b/OvmfPkg/AcpiTables/Dsdt.asl
@@ -36,7 +36,7 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF    ", 3) {
       //\r
       // BUS, I/O, and MMIO resources\r
       //\r
-      Name (_CRS, ResourceTemplate () {\r
+      Name (CRES, ResourceTemplate () {\r
         WORDBusNumber (          // Bus number resource (0); the bridge produces bus numbers for its subsequent buses\r
           ResourceProducer,      // bit 0 of general flags is 1\r
           MinFixed,              // Range is fixed\r
@@ -91,21 +91,102 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF    ", 3) {
           0x00020000             // Range Length\r
           )\r
 \r
-        DWORDMEMORY (            // Descriptor for linear frame buffer video RAM\r
+        DWORDMEMORY (            // Descriptor for 32-bit MMIO\r
           ResourceProducer,      // bit 0 of general flags is 0\r
           PosDecode,\r
           MinFixed,              // Range is fixed\r
           MaxFixed,              // Range is Fixed\r
-          Cacheable,\r
+          NonCacheable,\r
           ReadWrite,\r
           0x00000000,            // Granularity\r
           0xF8000000,            // Min\r
           0xFFFBFFFF,            // Max\r
           0x00000000,            // Translation\r
-          0x07FC0000             // Range Length\r
+          0x07FC0000,            // Range Length\r
+          ,                      // ResourceSourceIndex\r
+          ,                      // ResourceSource\r
+          PW32                   // DescriptorName\r
           )\r
       })\r
 \r
+      Name (CR64, ResourceTemplate () {\r
+        QWordMemory (            // Descriptor for 64-bit MMIO\r
+            ResourceProducer,    // bit 0 of general flags is 0\r
+            PosDecode,\r
+            MinFixed,            // Range is fixed\r
+            MaxFixed,            // Range is Fixed\r
+            Cacheable,\r
+            ReadWrite,\r
+            0x00000000,          // Granularity\r
+            0x8000000000,        // Min\r
+            0xFFFFFFFFFF,        // Max\r
+            0x00000000,          // Translation\r
+            0x8000000000,        // Range Length\r
+            ,                    // ResourceSourceIndex\r
+            ,                    // ResourceSource\r
+            PW64                 // DescriptorName\r
+            )\r
+      })\r
+\r
+      Method (_CRS, 0) {\r
+        //\r
+        // see the FIRMWARE_DATA structure in "OvmfPkg/AcpiPlatformDxe/Qemu.c"\r
+        //\r
+        External (FWDT, OpRegionObj)\r
+        Field(FWDT, QWordAcc, NoLock, Preserve) {\r
+          P0S, 64,               // PciWindow32.Base\r
+          P0E, 64,               // PciWindow32.End\r
+          P0L, 64,               // PciWindow32.Length\r
+          P1S, 64,               // PciWindow64.Base\r
+          P1E, 64,               // PciWindow64.End\r
+          P1L, 64                // PciWindow64.Length\r
+        }\r
+        Field(FWDT, DWordAcc, NoLock, Preserve) {\r
+          P0SL, 32,              // PciWindow32.Base,   low  32 bits\r
+          P0SH, 32,              // PciWindow32.Base,   high 32 bits\r
+          P0EL, 32,              // PciWindow32.End,    low  32 bits\r
+          P0EH, 32,              // PciWindow32.End,    high 32 bits\r
+          P0LL, 32,              // PciWindow32.Length, low  32 bits\r
+          P0LH, 32,              // PciWindow32.Length, high 32 bits\r
+          P1SL, 32,              // PciWindow64.Base,   low  32 bits\r
+          P1SH, 32,              // PciWindow64.Base,   high 32 bits\r
+          P1EL, 32,              // PciWindow64.End,    low  32 bits\r
+          P1EH, 32,              // PciWindow64.End,    high 32 bits\r
+          P1LL, 32,              // PciWindow64.Length, low  32 bits\r
+          P1LH, 32               // PciWindow64.Length, high 32 bits\r
+        }\r
+\r
+        //\r
+        // fixup 32-bit PCI IO window\r
+        //\r
+        CreateDWordField (CRES, \_SB.PCI0.PW32._MIN, PS32)\r
+        CreateDWordField (CRES, \_SB.PCI0.PW32._MAX, PE32)\r
+        CreateDWordField (CRES, \_SB.PCI0.PW32._LEN, PL32)\r
+        Store (P0SL, PS32)\r
+        Store (P0EL, PE32)\r
+        Store (P0LL, PL32)\r
+\r
+        If (LAnd (LEqual (P1SL, 0x00), LEqual (P1SH, 0x00))) {\r
+          Return (CRES)\r
+        } Else {\r
+          //\r
+          // fixup 64-bit PCI IO window\r
+          //\r
+          CreateQWordField (CR64, \_SB.PCI0.PW64._MIN, PS64)\r
+          CreateQWordField (CR64, \_SB.PCI0.PW64._MAX, PE64)\r
+          CreateQWordField (CR64, \_SB.PCI0.PW64._LEN, PL64)\r
+          Store (P1S, PS64)\r
+          Store (P1E, PE64)\r
+          Store (P1L, PL64)\r
+\r
+          //\r
+          // add window and return result\r
+          //\r
+          ConcatenateResTemplate (CRES, CR64, Local0)\r
+          Return (Local0)\r
+        }\r
+      }\r
+\r
       //\r
       // PCI Interrupt Routing Table - PIC Mode Only\r
       //\r