///\r
#pragma pack(1)\r
\r
-typedef UINT8 SERIAL_MODE;\r
-typedef UINT8 PARALLEL_MODE;\r
+typedef UINT8 SERIAL_MODE;\r
+typedef UINT8 PARALLEL_MODE;\r
\r
-#define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')\r
+#define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')\r
\r
///\r
/// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx\r
/// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte\r
/// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.\r
///\r
- UINT32 Signature;\r
+ UINT32 Signature;\r
\r
///\r
/// The value required such that byte checksum of TableLength equals zero.\r
///\r
- UINT8 TableChecksum;\r
+ UINT8 TableChecksum;\r
\r
///\r
/// The length of this table.\r
///\r
- UINT8 TableLength;\r
+ UINT8 TableLength;\r
\r
///\r
/// The major EFI revision for which this table was generated.\r
///\r
- UINT8 EfiMajorRevision;\r
+ UINT8 EfiMajorRevision;\r
\r
///\r
/// The minor EFI revision for which this table was generated.\r
///\r
- UINT8 EfiMinorRevision;\r
+ UINT8 EfiMinorRevision;\r
\r
///\r
/// The major revision of this table.\r
///\r
- UINT8 TableMajorRevision;\r
+ UINT8 TableMajorRevision;\r
\r
///\r
/// The minor revision of this table.\r
///\r
- UINT8 TableMinorRevision;\r
+ UINT8 TableMinorRevision;\r
\r
///\r
/// Reserved for future usage.\r
///\r
- UINT16 Reserved;\r
+ UINT16 Reserved;\r
\r
///\r
/// The segment of the entry point within the traditional BIOS for Compatibility16 functions.\r
///\r
- UINT16 Compatibility16CallSegment;\r
+ UINT16 Compatibility16CallSegment;\r
\r
///\r
/// The offset of the entry point within the traditional BIOS for Compatibility16 functions.\r
///\r
- UINT16 Compatibility16CallOffset;\r
+ UINT16 Compatibility16CallOffset;\r
\r
///\r
/// The segment of the entry point within the traditional BIOS for EfiCompatibility\r
/// to invoke the PnP installation check.\r
///\r
- UINT16 PnPInstallationCheckSegment;\r
+ UINT16 PnPInstallationCheckSegment;\r
\r
///\r
/// The Offset of the entry point within the traditional BIOS for EfiCompatibility\r
/// to invoke the PnP installation check.\r
///\r
- UINT16 PnPInstallationCheckOffset;\r
+ UINT16 PnPInstallationCheckOffset;\r
\r
///\r
/// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform\r
- ///Innovation Framework for EFI Driver Execution Environment Core Interface Specification (DXE CIS).\r
+ /// Innovation Framework for EFI Driver Execution Environment Core Interface Specification (DXE CIS).\r
///\r
- UINT32 EfiSystemTable;\r
+ UINT32 EfiSystemTable;\r
\r
///\r
/// The address of an OEM-provided identifier string. The string is null terminated.\r
///\r
- UINT32 OemIdStringPointer;\r
+ UINT32 OemIdStringPointer;\r
\r
///\r
/// The 32-bit physical address where ACPI RSD PTR is stored within the traditional\r
/// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI\r
/// RSD PTR with either the ACPI 1.0b or 2.0 values.\r
///\r
- UINT32 AcpiRsdPtrPointer;\r
+ UINT32 AcpiRsdPtrPointer;\r
\r
///\r
/// The OEM revision number. Usage is undefined but provided for OEM module usage.\r
///\r
- UINT16 OemRevision;\r
+ UINT16 OemRevision;\r
\r
///\r
/// The 32-bit physical address where INT15 E820 data is stored within the traditional\r
/// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the\r
/// data to the indicated area.\r
///\r
- UINT32 E820Pointer;\r
+ UINT32 E820Pointer;\r
\r
///\r
/// The length of the E820 data and is filled in by the EfiCompatibility code.\r
///\r
- UINT32 E820Length;\r
+ UINT32 E820Length;\r
\r
///\r
/// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.\r
/// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and\r
/// copy the data to the indicated area.\r
///\r
- UINT32 IrqRoutingTablePointer;\r
+ UINT32 IrqRoutingTablePointer;\r
\r
///\r
/// The length of the $PIR table and is filled in by the EfiCompatibility code.\r
///\r
- UINT32 IrqRoutingTableLength;\r
+ UINT32 IrqRoutingTableLength;\r
\r
///\r
/// The 32-bit physical address where the MP table is stored in the traditional BIOS.\r
/// The EfiCompatibility code will fill in the MpTablePtr value and copy the data\r
/// to the indicated area.\r
///\r
- UINT32 MpTablePtr;\r
+ UINT32 MpTablePtr;\r
\r
///\r
/// The length of the MP table and is filled in by the EfiCompatibility code.\r
///\r
- UINT32 MpTableLength;\r
+ UINT32 MpTableLength;\r
\r
///\r
/// The segment of the OEM-specific INT table/code.\r
///\r
- UINT16 OemIntSegment;\r
+ UINT16 OemIntSegment;\r
\r
///\r
/// The offset of the OEM-specific INT table/code.\r
///\r
- UINT16 OemIntOffset;\r
+ UINT16 OemIntOffset;\r
\r
///\r
/// The segment of the OEM-specific 32-bit table/code.\r
///\r
- UINT16 Oem32Segment;\r
+ UINT16 Oem32Segment;\r
\r
///\r
/// The offset of the OEM-specific 32-bit table/code.\r
///\r
- UINT16 Oem32Offset;\r
+ UINT16 Oem32Offset;\r
\r
///\r
/// The segment of the OEM-specific 16-bit table/code.\r
///\r
- UINT16 Oem16Segment;\r
+ UINT16 Oem16Segment;\r
\r
///\r
/// The offset of the OEM-specific 16-bit table/code.\r
///\r
- UINT16 Oem16Offset;\r
+ UINT16 Oem16Offset;\r
\r
///\r
/// The segment of the TPM binary passed to 16-bit CSM.\r
///\r
- UINT16 TpmSegment;\r
+ UINT16 TpmSegment;\r
\r
///\r
/// The offset of the TPM binary passed to 16-bit CSM.\r
///\r
- UINT16 TpmOffset;\r
+ UINT16 TpmOffset;\r
\r
///\r
/// A pointer to a string identifying the independent BIOS vendor.\r
///\r
- UINT32 IbvPointer;\r
+ UINT32 IbvPointer;\r
\r
///\r
/// This field is NULL for all systems not supporting PCI Express. This field is the base\r
/// Compatibility16InitializeYourself() is defined in Compatibility16\r
/// Functions.\r
///\r
- UINT32 PciExpressBase;\r
+ UINT32 PciExpressBase;\r
\r
///\r
/// Maximum PCI bus number assigned.\r
///\r
- UINT8 LastPciBus;\r
+ UINT8 LastPciBus;\r
\r
///\r
/// Start Address of Upper Memory Area (UMA) to be set as Read/Write. If\r
/// UmaAddress is a valid address in the shadow RAM, it also indicates that the region\r
/// from 0xC0000 to (UmaAddress - 1) can be used for Option ROM.\r
///\r
- UINT32 UmaAddress;\r
+ UINT32 UmaAddress;\r
\r
///\r
/// Upper Memory Area size in bytes to be set as Read/Write. If zero, no UMA region\r
/// will be set as Read/Write (i.e. all Shadow RAM is set as Read-Only).\r
///\r
- UINT32 UmaSize;\r
+ UINT32 UmaSize;\r
\r
///\r
/// Start Address of high memory that can be used for permanent allocation. If zero,\r
/// high memory is not available for permanent allocation.\r
///\r
- UINT32 HiPermanentMemoryAddress;\r
+ UINT32 HiPermanentMemoryAddress;\r
\r
///\r
/// Size of high memory that can be used for permanent allocation in bytes. If zero,\r
/// high memory is not available for permanent allocation.\r
///\r
- UINT32 HiPermanentMemorySize;\r
+ UINT32 HiPermanentMemorySize;\r
} EFI_COMPATIBILITY16_TABLE;\r
\r
///\r
/// Return:\r
/// AX = Return Status codes\r
///\r
- Legacy16InitializeYourself = 0x0000,\r
+ Legacy16InitializeYourself = 0x0000,\r
\r
///\r
/// Causes the Compatibility16 BIOS to perform any drive number translations to match the boot sequence.\r
/// Return:\r
/// AX = Returned status codes\r
///\r
- Legacy16UpdateBbs = 0x0001,\r
+ Legacy16UpdateBbs = 0x0001,\r
\r
///\r
/// Allows the Compatibility16 code to perform any final actions before booting. The Compatibility16\r
/// Return:\r
/// AX = Returned status codes\r
///\r
- Legacy16PrepareToBoot = 0x0002,\r
+ Legacy16PrepareToBoot = 0x0002,\r
\r
///\r
/// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is Read/Only.\r
/// Output:\r
/// AX = Returned status codes\r
///\r
- Legacy16Boot = 0x0003,\r
+ Legacy16Boot = 0x0003,\r
\r
///\r
/// Allows the Compatibility16 code to get the last device from which a boot was attempted. This is\r
/// AX = Returned status codes\r
/// BX = Number of non-BBS-compliant devices found. Equals 0 if BBS compliant.\r
///\r
- Legacy16DispatchOprom = 0x0005,\r
+ Legacy16DispatchOprom = 0x0005,\r
\r
///\r
/// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified length and returns the address\r
/// AX = Returned status codes\r
/// DS:BX = Address of the region\r
///\r
- Legacy16GetTableAddress = 0x0006,\r
+ Legacy16GetTableAddress = 0x0006,\r
\r
///\r
/// Enables the EfiCompatibility module to do any nonstandard processing of keyboard LEDs or state.\r
/// Output:\r
/// AX = Returned status codes\r
///\r
- Legacy16SetKeyboardLeds = 0x0007,\r
+ Legacy16SetKeyboardLeds = 0x0007,\r
\r
///\r
/// Enables the EfiCompatibility module to install an interrupt handler for PCI mass media devices that\r
/// Output:\r
/// AX = Returned status codes\r
///\r
- Legacy16InstallPciHandler = 0x0008\r
+ Legacy16InstallPciHandler = 0x0008\r
} EFI_COMPATIBILITY_FUNCTIONS;\r
\r
-\r
///\r
/// EFI_DISPATCH_OPROM_TABLE\r
///\r
typedef struct {\r
- UINT16 PnPInstallationCheckSegment; ///< A pointer to the PnpInstallationCheck data structure.\r
- UINT16 PnPInstallationCheckOffset; ///< A pointer to the PnpInstallationCheck data structure.\r
- UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3.\r
- UINT8 PciBus; ///< The PCI bus.\r
- UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function.\r
- UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may\r
- ///< increase this number, if BBS-compliant devices also hook INTs in order to force the\r
- ///< OpROM BIOS Setup to be executed.\r
- UINT32 BbsTablePointer; ///< A pointer to the BBS table.\r
- UINT16 RuntimeSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this\r
- ///< means that the relocation of this run time code is not supported.\r
- ///< Inconsistent with specification here:\r
- ///< The member's name "OpromDestinationSegment" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version]\r
- ///< has been changed to "RuntimeSegment" since keeping backward compatible.\r
-\r
+ UINT16 PnPInstallationCheckSegment; ///< A pointer to the PnpInstallationCheck data structure.\r
+ UINT16 PnPInstallationCheckOffset; ///< A pointer to the PnpInstallationCheck data structure.\r
+ UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3.\r
+ UINT8 PciBus; ///< The PCI bus.\r
+ UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function.\r
+ UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may\r
+ ///< increase this number, if BBS-compliant devices also hook INTs in order to force the\r
+ ///< OpROM BIOS Setup to be executed.\r
+ UINT32 BbsTablePointer; ///< A pointer to the BBS table.\r
+ UINT16 RuntimeSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this\r
+ ///< means that the relocation of this run time code is not supported.\r
+ ///< Inconsistent with specification here:\r
+ ///< The member's name "OpromDestinationSegment" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version]\r
+ ///< has been changed to "RuntimeSegment" since keeping backward compatible.\r
} EFI_DISPATCH_OPROM_TABLE;\r
\r
///\r
///\r
/// Starting address of memory under 1 MB. The ending address is assumed to be 640 KB or 0x9FFFF.\r
///\r
- UINT32 BiosLessThan1MB;\r
+ UINT32 BiosLessThan1MB;\r
\r
///\r
/// The starting address of the high memory block.\r
///\r
- UINT32 HiPmmMemory;\r
+ UINT32 HiPmmMemory;\r
\r
///\r
/// The length of high memory block.\r
///\r
- UINT32 HiPmmMemorySizeInBytes;\r
+ UINT32 HiPmmMemorySizeInBytes;\r
\r
///\r
/// The segment of the reverse thunk call code.\r
///\r
- UINT16 ReverseThunkCallSegment;\r
+ UINT16 ReverseThunkCallSegment;\r
\r
///\r
/// The offset of the reverse thunk call code.\r
///\r
- UINT16 ReverseThunkCallOffset;\r
+ UINT16 ReverseThunkCallOffset;\r
\r
///\r
/// The number of E820 entries copied to the Compatibility16 BIOS.\r
///\r
- UINT32 NumberE820Entries;\r
+ UINT32 NumberE820Entries;\r
\r
///\r
/// The amount of usable memory above 1 MB, e.g., E820 type 1 memory.\r
///\r
- UINT32 OsMemoryAbove1Mb;\r
+ UINT32 OsMemoryAbove1Mb;\r
\r
///\r
/// The start of thunk code in main memory. Memory cannot be used by BIOS or PMM.\r
///\r
- UINT32 ThunkStart;\r
+ UINT32 ThunkStart;\r
\r
///\r
/// The size of the thunk code.\r
///\r
- UINT32 ThunkSizeInBytes;\r
+ UINT32 ThunkSizeInBytes;\r
\r
///\r
/// Starting address of memory under 1 MB.\r
///\r
- UINT32 LowPmmMemory;\r
+ UINT32 LowPmmMemory;\r
\r
///\r
/// The length of low Memory block.\r
///\r
- UINT32 LowPmmMemorySizeInBytes;\r
+ UINT32 LowPmmMemorySizeInBytes;\r
} EFI_TO_COMPATIBILITY16_INIT_TABLE;\r
\r
///\r
/// DEVICE_PRODUCER_SERIAL.\r
///\r
typedef struct {\r
- UINT16 Address; ///< I/O address assigned to the serial port.\r
- UINT8 Irq; ///< IRQ assigned to the serial port.\r
- SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below.\r
+ UINT16 Address; ///< I/O address assigned to the serial port.\r
+ UINT8 Irq; ///< IRQ assigned to the serial port.\r
+ SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below.\r
} DEVICE_PRODUCER_SERIAL;\r
\r
///\r
/// DEVICE_PRODUCER_SERIAL's modes.\r
///@{\r
-#define DEVICE_SERIAL_MODE_NORMAL 0x00\r
-#define DEVICE_SERIAL_MODE_IRDA 0x01\r
-#define DEVICE_SERIAL_MODE_ASK_IR 0x02\r
-#define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00\r
-#define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10\r
-///@)\r
+#define DEVICE_SERIAL_MODE_NORMAL 0x00\r
+#define DEVICE_SERIAL_MODE_IRDA 0x01\r
+#define DEVICE_SERIAL_MODE_ASK_IR 0x02\r
+#define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00\r
+#define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10\r
+/// @)\r
\r
///\r
/// DEVICE_PRODUCER_PARALLEL.\r
///\r
typedef struct {\r
- UINT16 Address; ///< I/O address assigned to the parallel port.\r
- UINT8 Irq; ///< IRQ assigned to the parallel port.\r
- UINT8 Dma; ///< DMA assigned to the parallel port.\r
- PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below.\r
+ UINT16 Address; ///< I/O address assigned to the parallel port.\r
+ UINT8 Irq; ///< IRQ assigned to the parallel port.\r
+ UINT8 Dma; ///< DMA assigned to the parallel port.\r
+ PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below.\r
} DEVICE_PRODUCER_PARALLEL;\r
\r
///\r
/// DEVICE_PRODUCER_PARALLEL's modes.\r
///@{\r
-#define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00\r
-#define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01\r
-#define DEVICE_PARALLEL_MODE_MODE_EPP 0x02\r
-#define DEVICE_PARALLEL_MODE_MODE_ECP 0x03\r
+#define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00\r
+#define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01\r
+#define DEVICE_PARALLEL_MODE_MODE_EPP 0x02\r
+#define DEVICE_PARALLEL_MODE_MODE_ECP 0x03\r
///@}\r
\r
///\r
/// DEVICE_PRODUCER_FLOPPY\r
///\r
typedef struct {\r
- UINT16 Address; ///< I/O address assigned to the floppy.\r
- UINT8 Irq; ///< IRQ assigned to the floppy.\r
- UINT8 Dma; ///< DMA assigned to the floppy.\r
- UINT8 NumberOfFloppy; ///< Number of floppies in the system.\r
+ UINT16 Address; ///< I/O address assigned to the floppy.\r
+ UINT8 Irq; ///< IRQ assigned to the floppy.\r
+ UINT8 Dma; ///< DMA assigned to the floppy.\r
+ UINT8 NumberOfFloppy; ///< Number of floppies in the system.\r
} DEVICE_PRODUCER_FLOPPY;\r
\r
///\r
/// LEGACY_DEVICE_FLAGS\r
///\r
typedef struct {\r
- UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller.\r
- UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92.\r
- UINT32 Reserved : 30; ///< Reserved for future usage.\r
+ UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller.\r
+ UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92.\r
+ UINT32 Reserved : 30; ///< Reserved for future usage.\r
} LEGACY_DEVICE_FLAGS;\r
\r
///\r
/// DEVICE_PRODUCER_DATA_HEADER\r
///\r
typedef struct {\r
- DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below.\r
- DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below.\r
- DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below.\r
- UINT8 MousePresent; ///< Flag to indicate if mouse is present.\r
- LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM.\r
+ DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below.\r
+ DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below.\r
+ DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below.\r
+ UINT8 MousePresent; ///< Flag to indicate if mouse is present.\r
+ LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM.\r
} DEVICE_PRODUCER_DATA_HEADER;\r
\r
///\r
/// ATAPI_IDENTIFY\r
///\r
typedef struct {\r
- UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command.\r
+ UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command.\r
} ATAPI_IDENTIFY;\r
\r
///\r
/// per IDE controller. The IdentifyDrive is per drive. Index 0 is master and index\r
/// 1 is slave.\r
///\r
- UINT16 Status;\r
+ UINT16 Status;\r
\r
///\r
/// PCI bus of IDE controller.\r
///\r
- UINT32 Bus;\r
+ UINT32 Bus;\r
\r
///\r
/// PCI device of IDE controller.\r
///\r
- UINT32 Device;\r
+ UINT32 Device;\r
\r
///\r
/// PCI function of IDE controller.\r
///\r
- UINT32 Function;\r
+ UINT32 Function;\r
\r
///\r
/// Command ports base address.\r
///\r
- UINT16 CommandBaseAddress;\r
+ UINT16 CommandBaseAddress;\r
\r
///\r
/// Control ports base address.\r
///\r
- UINT16 ControlBaseAddress;\r
+ UINT16 ControlBaseAddress;\r
\r
///\r
/// Bus master address.\r
///\r
- UINT16 BusMasterAddress;\r
+ UINT16 BusMasterAddress;\r
\r
- UINT8 HddIrq;\r
+ UINT8 HddIrq;\r
\r
///\r
/// Data that identifies the drive data; one per possible attached drive.\r
///\r
- ATAPI_IDENTIFY IdentifyDrive[2];\r
+ ATAPI_IDENTIFY IdentifyDrive[2];\r
} HDD_INFO;\r
\r
///\r
/// BBS_STATUS_FLAGS;\.\r
///\r
typedef struct {\r
- UINT16 OldPosition : 4; ///< Prior priority.\r
- UINT16 Reserved1 : 4; ///< Reserved for future use.\r
- UINT16 Enabled : 1; ///< If 0, ignore this entry.\r
- UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.\r
+ UINT16 OldPosition : 4; ///< Prior priority.\r
+ UINT16 Reserved1 : 4; ///< Reserved for future use.\r
+ UINT16 Enabled : 1; ///< If 0, ignore this entry.\r
+ UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.\r
///< 1 = Boot attempted failed.\r
\r
///\r
/// 10 = Media is present and appears bootable.\r
/// 11 = Reserved.\r
///\r
- UINT16 MediaPresent : 2;\r
- UINT16 Reserved2 : 4; ///< Reserved for future use.\r
+ UINT16 MediaPresent : 2;\r
+ UINT16 Reserved2 : 4; ///< Reserved for future use.\r
} BBS_STATUS_FLAGS;\r
\r
///\r
///\r
/// The boot priority for this boot device. Values are defined below.\r
///\r
- UINT16 BootPriority;\r
+ UINT16 BootPriority;\r
\r
///\r
/// The PCI bus for this boot device.\r
///\r
- UINT32 Bus;\r
+ UINT32 Bus;\r
\r
///\r
/// The PCI device for this boot device.\r
///\r
- UINT32 Device;\r
+ UINT32 Device;\r
\r
///\r
/// The PCI function for the boot device.\r
///\r
- UINT32 Function;\r
+ UINT32 Function;\r
\r
///\r
/// The PCI class for this boot device.\r
///\r
- UINT8 Class;\r
+ UINT8 Class;\r
\r
///\r
/// The PCI Subclass for this boot device.\r
///\r
- UINT8 SubClass;\r
+ UINT8 SubClass;\r
\r
///\r
/// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r
///\r
- UINT16 MfgStringOffset;\r
+ UINT16 MfgStringOffset;\r
\r
///\r
/// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r
///\r
- UINT16 MfgStringSegment;\r
+ UINT16 MfgStringSegment;\r
\r
///\r
/// BBS device type. BBS device types are defined below.\r
///\r
- UINT16 DeviceType;\r
+ UINT16 DeviceType;\r
\r
///\r
/// Status of this boot device. Type BBS_STATUS_FLAGS is defined below.\r
///\r
- BBS_STATUS_FLAGS StatusFlags;\r
+ BBS_STATUS_FLAGS StatusFlags;\r
\r
///\r
/// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r
/// BCV devices.\r
///\r
- UINT16 BootHandlerOffset;\r
+ UINT16 BootHandlerOffset;\r
\r
///\r
/// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r
/// BCV devices.\r
///\r
- UINT16 BootHandlerSegment;\r
+ UINT16 BootHandlerSegment;\r
\r
///\r
/// Segment:offset address of an ASCIIZ description string describing this device.\r
///\r
- UINT16 DescStringOffset;\r
+ UINT16 DescStringOffset;\r
\r
///\r
/// Segment:offset address of an ASCIIZ description string describing this device.\r
///\r
- UINT16 DescStringSegment;\r
+ UINT16 DescStringSegment;\r
\r
///\r
/// Reserved.\r
///\r
- UINT32 InitPerReserved;\r
+ UINT32 InitPerReserved;\r
\r
///\r
/// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
/// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
/// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
///\r
- UINT32 AdditionalIrq13Handler;\r
+ UINT32 AdditionalIrq13Handler;\r
\r
///\r
/// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
/// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
/// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
///\r
- UINT32 AdditionalIrq18Handler;\r
+ UINT32 AdditionalIrq18Handler;\r
\r
///\r
/// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
/// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
/// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
///\r
- UINT32 AdditionalIrq19Handler;\r
+ UINT32 AdditionalIrq19Handler;\r
\r
///\r
/// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
/// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
/// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
///\r
- UINT32 AdditionalIrq40Handler;\r
- UINT8 AssignedDriveNumber;\r
- UINT32 AdditionalIrq41Handler;\r
- UINT32 AdditionalIrq46Handler;\r
- UINT32 IBV1;\r
- UINT32 IBV2;\r
+ UINT32 AdditionalIrq40Handler;\r
+ UINT8 AssignedDriveNumber;\r
+ UINT32 AdditionalIrq41Handler;\r
+ UINT32 AdditionalIrq46Handler;\r
+ UINT32 IBV1;\r
+ UINT32 IBV2;\r
} BBS_TABLE;\r
\r
///\r
/// BBS device type values\r
///@{\r
-#define BBS_FLOPPY 0x01\r
-#define BBS_HARDDISK 0x02\r
-#define BBS_CDROM 0x03\r
-#define BBS_PCMCIA 0x04\r
-#define BBS_USB 0x05\r
-#define BBS_EMBED_NETWORK 0x06\r
-#define BBS_BEV_DEVICE 0x80\r
-#define BBS_UNKNOWN 0xff\r
+#define BBS_FLOPPY 0x01\r
+#define BBS_HARDDISK 0x02\r
+#define BBS_CDROM 0x03\r
+#define BBS_PCMCIA 0x04\r
+#define BBS_USB 0x05\r
+#define BBS_EMBED_NETWORK 0x06\r
+#define BBS_BEV_DEVICE 0x80\r
+#define BBS_UNKNOWN 0xff\r
///@}\r
\r
///\r
/// BBS boot priority values\r
///@{\r
-#define BBS_DO_NOT_BOOT_FROM 0xFFFC\r
-#define BBS_LOWEST_PRIORITY 0xFFFD\r
-#define BBS_UNPRIORITIZED_ENTRY 0xFFFE\r
-#define BBS_IGNORE_ENTRY 0xFFFF\r
+#define BBS_DO_NOT_BOOT_FROM 0xFFFC\r
+#define BBS_LOWEST_PRIORITY 0xFFFD\r
+#define BBS_UNPRIORITIZED_ENTRY 0xFFFE\r
+#define BBS_IGNORE_ENTRY 0xFFFF\r
///@}\r
\r
///\r
/// Access mechanism used to generate the soft SMI. Defined types are below. The other\r
/// values are reserved for future usage.\r
///\r
- UINT16 Type : 3;\r
+ UINT16 Type : 3;\r
\r
///\r
/// The size of "port" in bits. Defined values are below.\r
///\r
- UINT16 PortGranularity : 3;\r
+ UINT16 PortGranularity : 3;\r
\r
///\r
/// The size of data in bits. Defined values are below.\r
///\r
- UINT16 DataGranularity : 3;\r
+ UINT16 DataGranularity : 3;\r
\r
///\r
/// Reserved for future use.\r
///\r
- UINT16 Reserved : 7;\r
+ UINT16 Reserved : 7;\r
} SMM_ATTRIBUTES;\r
\r
///\r
/// SMM_ATTRIBUTES type values.\r
///@{\r
-#define STANDARD_IO 0x00\r
-#define STANDARD_MEMORY 0x01\r
+#define STANDARD_IO 0x00\r
+#define STANDARD_MEMORY 0x01\r
///@}\r
\r
///\r
/// SMM_ATTRIBUTES port size constants.\r
///@{\r
-#define PORT_SIZE_8 0x00\r
-#define PORT_SIZE_16 0x01\r
-#define PORT_SIZE_32 0x02\r
-#define PORT_SIZE_64 0x03\r
+#define PORT_SIZE_8 0x00\r
+#define PORT_SIZE_16 0x01\r
+#define PORT_SIZE_32 0x02\r
+#define PORT_SIZE_64 0x03\r
///@}\r
\r
///\r
/// SMM_ATTRIBUTES data size constants.\r
///@{\r
-#define DATA_SIZE_8 0x00\r
-#define DATA_SIZE_16 0x01\r
-#define DATA_SIZE_32 0x02\r
-#define DATA_SIZE_64 0x03\r
+#define DATA_SIZE_8 0x00\r
+#define DATA_SIZE_16 0x01\r
+#define DATA_SIZE_32 0x02\r
+#define DATA_SIZE_64 0x03\r
///@}\r
\r
///\r
/// SMM_FUNCTION & relating constants.\r
///\r
typedef struct {\r
- UINT16 Function : 15;\r
- UINT16 Owner : 1;\r
+ UINT16 Function : 15;\r
+ UINT16 Owner : 1;\r
} SMM_FUNCTION;\r
\r
///\r
/// SMM_FUNCTION Function constants.\r
///@{\r
-#define INT15_D042 0x0000\r
-#define GET_USB_BOOT_INFO 0x0001\r
-#define DMI_PNP_50_57 0x0002\r
+#define INT15_D042 0x0000\r
+#define GET_USB_BOOT_INFO 0x0001\r
+#define DMI_PNP_50_57 0x0002\r
///@}\r
\r
///\r
/// SMM_FUNCTION Owner constants.\r
///@{\r
-#define STANDARD_OWNER 0x0\r
-#define OEM_OWNER 0x1\r
+#define STANDARD_OWNER 0x0\r
+#define OEM_OWNER 0x1\r
///@}\r
\r
///\r
/// Describes the access mechanism, SmmPort, and SmmData sizes. Type\r
/// SMM_ATTRIBUTES is defined below.\r
///\r
- SMM_ATTRIBUTES SmmAttributes;\r
+ SMM_ATTRIBUTES SmmAttributes;\r
\r
///\r
/// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below.\r
///\r
- SMM_FUNCTION SmmFunction;\r
+ SMM_FUNCTION SmmFunction;\r
\r
///\r
/// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16 bytes.\r
///\r
- UINT8 SmmPort;\r
+ UINT8 SmmPort;\r
\r
///\r
/// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16 bytes.\r
///\r
- UINT8 SmmData;\r
+ UINT8 SmmData;\r
} SMM_ENTRY;\r
\r
///\r
/// SMM_TABLE\r
///\r
typedef struct {\r
- UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry.\r
- SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below.\r
+ UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry.\r
+ SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below.\r
} SMM_TABLE;\r
\r
///\r
///\r
/// This bit set indicates that the ServiceAreaData is valid.\r
///\r
- UINT8 DirectoryServiceValidity : 1;\r
+ UINT8 DirectoryServiceValidity : 1;\r
\r
///\r
/// This bit set indicates to use the Reserve Area Boot Code Address (RACBA) only if\r
/// DirectoryServiceValidity is 0.\r
///\r
- UINT8 RabcaUsedFlag : 1;\r
+ UINT8 RabcaUsedFlag : 1;\r
\r
///\r
/// This bit set indicates to execute hard disk diagnostics.\r
///\r
- UINT8 ExecuteHddDiagnosticsFlag : 1;\r
+ UINT8 ExecuteHddDiagnosticsFlag : 1;\r
\r
///\r
/// Reserved for future use. Set to 0.\r
///\r
- UINT8 Reserved : 5;\r
+ UINT8 Reserved : 5;\r
} UDC_ATTRIBUTES;\r
\r
///\r
/// This field contains the bit-mapped attributes of the PARTIES information. Type\r
/// UDC_ATTRIBUTES is defined below.\r
///\r
- UDC_ATTRIBUTES Attributes;\r
+ UDC_ATTRIBUTES Attributes;\r
\r
///\r
/// This field contains the zero-based device on which the selected\r
/// ServiceDataArea is present. It is 0 for master and 1 for the slave device.\r
///\r
- UINT8 DeviceNumber;\r
+ UINT8 DeviceNumber;\r
\r
///\r
/// This field contains the zero-based index into the BbsTable for the parent device.\r
/// This index allows the user to reference the parent device information such as PCI\r
/// bus, device function.\r
///\r
- UINT8 BbsTableEntryNumberForParentDevice;\r
+ UINT8 BbsTableEntryNumberForParentDevice;\r
\r
///\r
/// This field contains the zero-based index into the BbsTable for the boot entry.\r
///\r
- UINT8 BbsTableEntryNumberForBoot;\r
+ UINT8 BbsTableEntryNumberForBoot;\r
\r
///\r
/// This field contains the zero-based index into the BbsTable for the HDD diagnostics entry.\r
///\r
- UINT8 BbsTableEntryNumberForHddDiag;\r
+ UINT8 BbsTableEntryNumberForHddDiag;\r
\r
///\r
/// The raw Beer data.\r
///\r
- UINT8 BeerData[128];\r
+ UINT8 BeerData[128];\r
\r
///\r
/// The raw data of selected service area.\r
///\r
- UINT8 ServiceAreaData[64];\r
+ UINT8 ServiceAreaData[64];\r
} UD_TABLE;\r
\r
-#define EFI_TO_LEGACY_MAJOR_VERSION 0x02\r
-#define EFI_TO_LEGACY_MINOR_VERSION 0x00\r
-#define MAX_IDE_CONTROLLER 8\r
+#define EFI_TO_LEGACY_MAJOR_VERSION 0x02\r
+#define EFI_TO_LEGACY_MINOR_VERSION 0x00\r
+#define MAX_IDE_CONTROLLER 8\r
\r
///\r
/// EFI_TO_COMPATIBILITY16_BOOT_TABLE\r
///\r
typedef struct {\r
- UINT16 MajorVersion; ///< The EfiCompatibility major version number.\r
- UINT16 MinorVersion; ///< The EfiCompatibility minor version number.\r
- UINT32 AcpiTable; ///< The location of the RSDT ACPI table. < 4G range.\r
- UINT32 SmbiosTable; ///< The location of the SMBIOS table in EFI memory. < 4G range.\r
- UINT32 SmbiosTableLength;\r
+ UINT16 MajorVersion; ///< The EfiCompatibility major version number.\r
+ UINT16 MinorVersion; ///< The EfiCompatibility minor version number.\r
+ UINT32 AcpiTable; ///< The location of the RSDT ACPI table. < 4G range.\r
+ UINT32 SmbiosTable; ///< The location of the SMBIOS table in EFI memory. < 4G range.\r
+ UINT32 SmbiosTableLength;\r
//\r
// Legacy SIO state\r
//\r
- DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information.\r
- UINT16 DevicePathType; ///< The default boot type.\r
- UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI.\r
- UINT32 NumberE820Entries; ///< Number of E820 entries. The number can change from the\r
+ DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information.\r
+ UINT16 DevicePathType; ///< The default boot type.\r
+ UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI.\r
+ UINT32 NumberE820Entries; ///< Number of E820 entries. The number can change from the\r
///< Compatibility16InitializeYourself() function.\r
//\r
// Controller & Drive Identify[2] per controller information\r
//\r
- HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data.\r
- UINT32 NumberBbsEntries; ///< Number of entries in the BBS table\r
- UINT32 BbsTable; ///< A pointer to the BBS table. Type BBS_TABLE is defined below.\r
- UINT32 SmmTable; ///< A pointer to the SMM table. Type SMM_TABLE is defined below.\r
- UINT32 OsMemoryAbove1Mb; ///< The amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can\r
+ HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data.\r
+ UINT32 NumberBbsEntries; ///< Number of entries in the BBS table\r
+ UINT32 BbsTable; ///< A pointer to the BBS table. Type BBS_TABLE is defined below.\r
+ UINT32 SmmTable; ///< A pointer to the SMM table. Type SMM_TABLE is defined below.\r
+ UINT32 OsMemoryAbove1Mb; ///< The amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can\r
///< differ from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more\r
///< memory may have been discovered.\r
- UINT32 UnconventionalDeviceTable; ///< Information to boot off an unconventional device like a PARTIES partition. Type\r
+ UINT32 UnconventionalDeviceTable; ///< Information to boot off an unconventional device like a PARTIES partition. Type\r
///< UD_TABLE is defined below.\r
} EFI_TO_COMPATIBILITY16_BOOT_TABLE;\r
\r
/// EFI_LEGACY_INSTALL_PCI_HANDLER\r
///\r
typedef struct {\r
- UINT8 PciBus; ///< The PCI bus of the device.\r
- UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0.\r
- UINT8 PciSegment; ///< The PCI segment of the device.\r
- UINT8 PciClass; ///< The PCI class code of the device.\r
- UINT8 PciSubclass; ///< The PCI subclass code of the device.\r
- UINT8 PciInterface; ///< The PCI interface code of the device.\r
+ UINT8 PciBus; ///< The PCI bus of the device.\r
+ UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0.\r
+ UINT8 PciSegment; ///< The PCI segment of the device.\r
+ UINT8 PciClass; ///< The PCI class code of the device.\r
+ UINT8 PciSubclass; ///< The PCI subclass code of the device.\r
+ UINT8 PciInterface; ///< The PCI interface code of the device.\r
//\r
// Primary section\r
//\r
- UINT8 PrimaryIrq; ///< The primary device IRQ.\r
- UINT8 PrimaryReserved; ///< Reserved.\r
- UINT16 PrimaryControl; ///< The primary device control I/O base.\r
- UINT16 PrimaryBase; ///< The primary device I/O base.\r
- UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base.\r
+ UINT8 PrimaryIrq; ///< The primary device IRQ.\r
+ UINT8 PrimaryReserved; ///< Reserved.\r
+ UINT16 PrimaryControl; ///< The primary device control I/O base.\r
+ UINT16 PrimaryBase; ///< The primary device I/O base.\r
+ UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base.\r
//\r
// Secondary Section\r
//\r
- UINT8 SecondaryIrq; ///< The secondary device IRQ.\r
- UINT8 SecondaryReserved; ///< Reserved.\r
- UINT16 SecondaryControl; ///< The secondary device control I/O base.\r
- UINT16 SecondaryBase; ///< The secondary device I/O base.\r
- UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base.\r
+ UINT8 SecondaryIrq; ///< The secondary device IRQ.\r
+ UINT8 SecondaryReserved; ///< Reserved.\r
+ UINT16 SecondaryControl; ///< The secondary device control I/O base.\r
+ UINT16 SecondaryBase; ///< The secondary device I/O base.\r
+ UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base.\r
} EFI_LEGACY_INSTALL_PCI_HANDLER;\r
\r
//\r
/// to Segment:Offset 16-bit form.\r
///\r
///@{\r
-#define EFI_SEGMENT(_Adr) (UINT16) ((UINT16) (((UINTN) (_Adr)) >> 4) & 0xf000)\r
-#define EFI_OFFSET(_Adr) (UINT16) (((UINT16) ((UINTN) (_Adr))) & 0xffff)\r
+#define EFI_SEGMENT(_Adr) (UINT16) ((UINT16) (((UINTN) (_Adr)) >> 4) & 0xf000)\r
+#define EFI_OFFSET(_Adr) (UINT16) (((UINT16) ((UINTN) (_Adr))) & 0xffff)\r
///@}\r
\r
-#define CARRY_FLAG 0x01\r
+#define CARRY_FLAG 0x01\r
\r
///\r
/// EFI_EFLAGS_REG\r
///\r
typedef struct {\r
- UINT32 CF:1;\r
- UINT32 Reserved1:1;\r
- UINT32 PF:1;\r
- UINT32 Reserved2:1;\r
- UINT32 AF:1;\r
- UINT32 Reserved3:1;\r
- UINT32 ZF:1;\r
- UINT32 SF:1;\r
- UINT32 TF:1;\r
- UINT32 IF:1;\r
- UINT32 DF:1;\r
- UINT32 OF:1;\r
- UINT32 IOPL:2;\r
- UINT32 NT:1;\r
- UINT32 Reserved4:2;\r
- UINT32 VM:1;\r
- UINT32 Reserved5:14;\r
+ UINT32 CF : 1;\r
+ UINT32 Reserved1 : 1;\r
+ UINT32 PF : 1;\r
+ UINT32 Reserved2 : 1;\r
+ UINT32 AF : 1;\r
+ UINT32 Reserved3 : 1;\r
+ UINT32 ZF : 1;\r
+ UINT32 SF : 1;\r
+ UINT32 TF : 1;\r
+ UINT32 IF : 1;\r
+ UINT32 DF : 1;\r
+ UINT32 OF : 1;\r
+ UINT32 IOPL : 2;\r
+ UINT32 NT : 1;\r
+ UINT32 Reserved4 : 2;\r
+ UINT32 VM : 1;\r
+ UINT32 Reserved5 : 14;\r
} EFI_EFLAGS_REG;\r
\r
///\r
/// EFI_DWORD_REGS\r
///\r
typedef struct {\r
- UINT32 EAX;\r
- UINT32 EBX;\r
- UINT32 ECX;\r
- UINT32 EDX;\r
- UINT32 ESI;\r
- UINT32 EDI;\r
- EFI_EFLAGS_REG EFlags;\r
- UINT16 ES;\r
- UINT16 CS;\r
- UINT16 SS;\r
- UINT16 DS;\r
- UINT16 FS;\r
- UINT16 GS;\r
- UINT32 EBP;\r
- UINT32 ESP;\r
+ UINT32 EAX;\r
+ UINT32 EBX;\r
+ UINT32 ECX;\r
+ UINT32 EDX;\r
+ UINT32 ESI;\r
+ UINT32 EDI;\r
+ EFI_EFLAGS_REG EFlags;\r
+ UINT16 ES;\r
+ UINT16 CS;\r
+ UINT16 SS;\r
+ UINT16 DS;\r
+ UINT16 FS;\r
+ UINT16 GS;\r
+ UINT32 EBP;\r
+ UINT32 ESP;\r
} EFI_DWORD_REGS;\r
\r
///\r
/// EFI_FLAGS_REG\r
///\r
typedef struct {\r
- UINT16 CF:1;\r
- UINT16 Reserved1:1;\r
- UINT16 PF:1;\r
- UINT16 Reserved2:1;\r
- UINT16 AF:1;\r
- UINT16 Reserved3:1;\r
- UINT16 ZF:1;\r
- UINT16 SF:1;\r
- UINT16 TF:1;\r
- UINT16 IF:1;\r
- UINT16 DF:1;\r
- UINT16 OF:1;\r
- UINT16 IOPL:2;\r
- UINT16 NT:1;\r
- UINT16 Reserved4:1;\r
+ UINT16 CF : 1;\r
+ UINT16 Reserved1 : 1;\r
+ UINT16 PF : 1;\r
+ UINT16 Reserved2 : 1;\r
+ UINT16 AF : 1;\r
+ UINT16 Reserved3 : 1;\r
+ UINT16 ZF : 1;\r
+ UINT16 SF : 1;\r
+ UINT16 TF : 1;\r
+ UINT16 IF : 1;\r
+ UINT16 DF : 1;\r
+ UINT16 OF : 1;\r
+ UINT16 IOPL : 2;\r
+ UINT16 NT : 1;\r
+ UINT16 Reserved4 : 1;\r
} EFI_FLAGS_REG;\r
\r
///\r
/// EFI_WORD_REGS\r
///\r
typedef struct {\r
- UINT16 AX;\r
- UINT16 ReservedAX;\r
- UINT16 BX;\r
- UINT16 ReservedBX;\r
- UINT16 CX;\r
- UINT16 ReservedCX;\r
- UINT16 DX;\r
- UINT16 ReservedDX;\r
- UINT16 SI;\r
- UINT16 ReservedSI;\r
- UINT16 DI;\r
- UINT16 ReservedDI;\r
- EFI_FLAGS_REG Flags;\r
- UINT16 ReservedFlags;\r
- UINT16 ES;\r
- UINT16 CS;\r
- UINT16 SS;\r
- UINT16 DS;\r
- UINT16 FS;\r
- UINT16 GS;\r
- UINT16 BP;\r
- UINT16 ReservedBP;\r
- UINT16 SP;\r
- UINT16 ReservedSP;\r
+ UINT16 AX;\r
+ UINT16 ReservedAX;\r
+ UINT16 BX;\r
+ UINT16 ReservedBX;\r
+ UINT16 CX;\r
+ UINT16 ReservedCX;\r
+ UINT16 DX;\r
+ UINT16 ReservedDX;\r
+ UINT16 SI;\r
+ UINT16 ReservedSI;\r
+ UINT16 DI;\r
+ UINT16 ReservedDI;\r
+ EFI_FLAGS_REG Flags;\r
+ UINT16 ReservedFlags;\r
+ UINT16 ES;\r
+ UINT16 CS;\r
+ UINT16 SS;\r
+ UINT16 DS;\r
+ UINT16 FS;\r
+ UINT16 GS;\r
+ UINT16 BP;\r
+ UINT16 ReservedBP;\r
+ UINT16 SP;\r
+ UINT16 ReservedSP;\r
} EFI_WORD_REGS;\r
\r
///\r
/// EFI_BYTE_REGS\r
///\r
typedef struct {\r
- UINT8 AL, AH;\r
- UINT16 ReservedAX;\r
- UINT8 BL, BH;\r
- UINT16 ReservedBX;\r
- UINT8 CL, CH;\r
- UINT16 ReservedCX;\r
- UINT8 DL, DH;\r
- UINT16 ReservedDX;\r
+ UINT8 AL, AH;\r
+ UINT16 ReservedAX;\r
+ UINT8 BL, BH;\r
+ UINT16 ReservedBX;\r
+ UINT8 CL, CH;\r
+ UINT16 ReservedCX;\r
+ UINT8 DL, DH;\r
+ UINT16 ReservedDX;\r
} EFI_BYTE_REGS;\r
\r
///\r
/// EFI_IA32_REGISTER_SET\r
///\r
typedef union {\r
- EFI_DWORD_REGS E;\r
- EFI_WORD_REGS X;\r
- EFI_BYTE_REGS H;\r
+ EFI_DWORD_REGS E;\r
+ EFI_WORD_REGS X;\r
+ EFI_BYTE_REGS H;\r
} EFI_IA32_REGISTER_SET;\r
\r
/**\r
///\r
/// Performs traditional software INT. See the Int86() function description.\r
///\r
- EFI_LEGACY_BIOS_INT86 Int86;\r
+ EFI_LEGACY_BIOS_INT86 Int86;\r
\r
///\r
/// Performs a far call into Compatibility16 or traditional OpROM code.\r
///\r
- EFI_LEGACY_BIOS_FARCALL86 FarCall86;\r
+ EFI_LEGACY_BIOS_FARCALL86 FarCall86;\r
\r
///\r
/// Checks if a traditional OpROM exists for this device.\r
///\r
- EFI_LEGACY_BIOS_CHECK_ROM CheckPciRom;\r
+ EFI_LEGACY_BIOS_CHECK_ROM CheckPciRom;\r
\r
///\r
/// Loads a traditional OpROM in traditional OpROM address space.\r
///\r
- EFI_LEGACY_BIOS_INSTALL_ROM InstallPciRom;\r
+ EFI_LEGACY_BIOS_INSTALL_ROM InstallPciRom;\r
\r
///\r
/// Boots a traditional OS.\r
///\r
- EFI_LEGACY_BIOS_BOOT LegacyBoot;\r
+ EFI_LEGACY_BIOS_BOOT LegacyBoot;\r
\r
///\r
/// Updates BDA to reflect the current EFI keyboard LED status.\r
///\r
- EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS UpdateKeyboardLedStatus;\r
+ EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS UpdateKeyboardLedStatus;\r
\r
///\r
/// Allows an external agent, such as BIOS Setup, to get the BBS data.\r
///\r
- EFI_LEGACY_BIOS_GET_BBS_INFO GetBbsInfo;\r
+ EFI_LEGACY_BIOS_GET_BBS_INFO GetBbsInfo;\r
\r
///\r
/// Causes all legacy OpROMs to be shadowed.\r
///\r
- EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS ShadowAllLegacyOproms;\r
+ EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS ShadowAllLegacyOproms;\r
\r
///\r
/// Performs all actions prior to boot. Used when booting an EFI-aware OS\r
/// rather than a legacy OS.\r
///\r
- EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI PrepareToBootEfi;\r
+ EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI PrepareToBootEfi;\r
\r
///\r
/// Allows EFI to reserve an area in the 0xE0000 or 0xF0000 block.\r
///\r
- EFI_LEGACY_BIOS_GET_LEGACY_REGION GetLegacyRegion;\r
+ EFI_LEGACY_BIOS_GET_LEGACY_REGION GetLegacyRegion;\r
\r
///\r
/// Allows EFI to copy data to the area specified by GetLegacyRegion.\r
///\r
- EFI_LEGACY_BIOS_COPY_LEGACY_REGION CopyLegacyRegion;\r
+ EFI_LEGACY_BIOS_COPY_LEGACY_REGION CopyLegacyRegion;\r
\r
///\r
/// Allows the user to boot off an unconventional device such as a PARTIES partition.\r
///\r
- EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE BootUnconventionalDevice;\r
+ EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE BootUnconventionalDevice;\r
};\r
\r
//\r
} \\r
} while (FALSE)\r
\r
-extern EFI_GUID gEfiLegacyBiosProtocolGuid;\r
+extern EFI_GUID gEfiLegacyBiosProtocolGuid;\r
\r
#endif\r
projects / mirror_edk2.git / blobdiff