#ifndef _LEGACY_BIOS_INTERFACE_\r
#define _LEGACY_BIOS_INTERFACE_\r
\r
-\r
#include <FrameworkDxe.h>\r
#include <IndustryStandard/Pci.h>\r
#include <IndustryStandard/SmBios.h>\r
// BUGBUG: This entry maybe changed to PCD in future and wait for\r
// redesign of BDS library\r
//\r
-#define MAX_BBS_ENTRIES 0x100\r
+#define MAX_BBS_ENTRIES 0x100\r
\r
//\r
// Thunk Status Codes\r
//\r
// 8259 Hardware definitions\r
//\r
-#define LEGACY_MODE_BASE_VECTOR_MASTER 0x08\r
-#define LEGACY_MODE_BASE_VECTOR_SLAVE 0x70\r
+#define LEGACY_MODE_BASE_VECTOR_MASTER 0x08\r
+#define LEGACY_MODE_BASE_VECTOR_SLAVE 0x70\r
\r
//\r
// The original PC used INT8-F for master PIC. Since these mapped over\r
// offset + 0xabcd could overflow which exceeds 0xFFFF which is invalid in real mode.\r
// So this will keep offset as small as possible to avoid offset overflow in real mode.\r
//\r
-#define NORMALIZE_EFI_SEGMENT(_Adr) (UINT16) (((UINTN) (_Adr)) >> 4)\r
-#define NORMALIZE_EFI_OFFSET(_Adr) (UINT16) (((UINT16) ((UINTN) (_Adr))) & 0xf)\r
+#define NORMALIZE_EFI_SEGMENT(_Adr) (UINT16) (((UINTN) (_Adr)) >> 4)\r
+#define NORMALIZE_EFI_OFFSET(_Adr) (UINT16) (((UINT16) ((UINTN) (_Adr))) & 0xf)\r
\r
//\r
// Trace defines\r
//\r
//\r
-#define LEGACY_BDA_TRACE 0x000\r
-#define LEGACY_BIOS_TRACE 0x040\r
-#define LEGACY_BOOT_TRACE 0x080\r
-#define LEGACY_CMOS_TRACE 0x0C0\r
-#define LEGACY_IDE_TRACE 0x100\r
-#define LEGACY_MP_TRACE 0x140\r
-#define LEGACY_PCI_TRACE 0x180\r
-#define LEGACY_SIO_TRACE 0x1C0\r
-\r
-#define LEGACY_PCI_TRACE_000 LEGACY_PCI_TRACE + 0x00\r
-#define LEGACY_PCI_TRACE_001 LEGACY_PCI_TRACE + 0x01\r
-#define LEGACY_PCI_TRACE_002 LEGACY_PCI_TRACE + 0x02\r
-#define LEGACY_PCI_TRACE_003 LEGACY_PCI_TRACE + 0x03\r
-#define LEGACY_PCI_TRACE_004 LEGACY_PCI_TRACE + 0x04\r
-#define LEGACY_PCI_TRACE_005 LEGACY_PCI_TRACE + 0x05\r
-#define LEGACY_PCI_TRACE_006 LEGACY_PCI_TRACE + 0x06\r
-#define LEGACY_PCI_TRACE_007 LEGACY_PCI_TRACE + 0x07\r
-#define LEGACY_PCI_TRACE_008 LEGACY_PCI_TRACE + 0x08\r
-#define LEGACY_PCI_TRACE_009 LEGACY_PCI_TRACE + 0x09\r
-#define LEGACY_PCI_TRACE_00A LEGACY_PCI_TRACE + 0x0A\r
-#define LEGACY_PCI_TRACE_00B LEGACY_PCI_TRACE + 0x0B\r
-#define LEGACY_PCI_TRACE_00C LEGACY_PCI_TRACE + 0x0C\r
-#define LEGACY_PCI_TRACE_00D LEGACY_PCI_TRACE + 0x0D\r
-#define LEGACY_PCI_TRACE_00E LEGACY_PCI_TRACE + 0x0E\r
-#define LEGACY_PCI_TRACE_00F LEGACY_PCI_TRACE + 0x0F\r
-\r
-#define BDA_VIDEO_MODE 0x49\r
-\r
-#define IDE_PI_REGISTER_PNE BIT0\r
-#define IDE_PI_REGISTER_SNE BIT2\r
+#define LEGACY_BDA_TRACE 0x000\r
+#define LEGACY_BIOS_TRACE 0x040\r
+#define LEGACY_BOOT_TRACE 0x080\r
+#define LEGACY_CMOS_TRACE 0x0C0\r
+#define LEGACY_IDE_TRACE 0x100\r
+#define LEGACY_MP_TRACE 0x140\r
+#define LEGACY_PCI_TRACE 0x180\r
+#define LEGACY_SIO_TRACE 0x1C0\r
+\r
+#define LEGACY_PCI_TRACE_000 LEGACY_PCI_TRACE + 0x00\r
+#define LEGACY_PCI_TRACE_001 LEGACY_PCI_TRACE + 0x01\r
+#define LEGACY_PCI_TRACE_002 LEGACY_PCI_TRACE + 0x02\r
+#define LEGACY_PCI_TRACE_003 LEGACY_PCI_TRACE + 0x03\r
+#define LEGACY_PCI_TRACE_004 LEGACY_PCI_TRACE + 0x04\r
+#define LEGACY_PCI_TRACE_005 LEGACY_PCI_TRACE + 0x05\r
+#define LEGACY_PCI_TRACE_006 LEGACY_PCI_TRACE + 0x06\r
+#define LEGACY_PCI_TRACE_007 LEGACY_PCI_TRACE + 0x07\r
+#define LEGACY_PCI_TRACE_008 LEGACY_PCI_TRACE + 0x08\r
+#define LEGACY_PCI_TRACE_009 LEGACY_PCI_TRACE + 0x09\r
+#define LEGACY_PCI_TRACE_00A LEGACY_PCI_TRACE + 0x0A\r
+#define LEGACY_PCI_TRACE_00B LEGACY_PCI_TRACE + 0x0B\r
+#define LEGACY_PCI_TRACE_00C LEGACY_PCI_TRACE + 0x0C\r
+#define LEGACY_PCI_TRACE_00D LEGACY_PCI_TRACE + 0x0D\r
+#define LEGACY_PCI_TRACE_00E LEGACY_PCI_TRACE + 0x0E\r
+#define LEGACY_PCI_TRACE_00F LEGACY_PCI_TRACE + 0x0F\r
+\r
+#define BDA_VIDEO_MODE 0x49\r
+\r
+#define IDE_PI_REGISTER_PNE BIT0\r
+#define IDE_PI_REGISTER_SNE BIT2\r
\r
typedef struct {\r
- UINTN PciSegment;\r
- UINTN PciBus;\r
- UINTN PciDevice;\r
- UINTN PciFunction;\r
- UINT32 ShadowAddress;\r
- UINT32 ShadowedSize;\r
- UINT8 DiskStart;\r
- UINT8 DiskEnd;\r
+ UINTN PciSegment;\r
+ UINTN PciBus;\r
+ UINTN PciDevice;\r
+ UINTN PciFunction;\r
+ UINT32 ShadowAddress;\r
+ UINT32 ShadowedSize;\r
+ UINT8 DiskStart;\r
+ UINT8 DiskEnd;\r
} ROM_INSTANCE_ENTRY;\r
\r
//\r
//\r
#if defined (MDE_CPU_IA32)\r
\r
-#define NUM_REAL_GDT_ENTRIES 3\r
-#define CONVENTIONAL_MEMORY_TOP 0xA0000 // 640 KB\r
-#define INITIAL_VALUE_BELOW_1K 0x0\r
+#define NUM_REAL_GDT_ENTRIES 3\r
+#define CONVENTIONAL_MEMORY_TOP 0xA0000 // 640 KB\r
+#define INITIAL_VALUE_BELOW_1K 0x0\r
\r
#elif defined (MDE_CPU_X64)\r
\r
-#define NUM_REAL_GDT_ENTRIES 8\r
-#define CONVENTIONAL_MEMORY_TOP 0xA0000 // 640 KB\r
-#define INITIAL_VALUE_BELOW_1K 0x0\r
+#define NUM_REAL_GDT_ENTRIES 8\r
+#define CONVENTIONAL_MEMORY_TOP 0xA0000 // 640 KB\r
+#define INITIAL_VALUE_BELOW_1K 0x0\r
\r
#endif\r
\r
// Define what a processor GDT looks like\r
//\r
typedef struct {\r
- UINT32 LimitLo : 16;\r
- UINT32 BaseLo : 16;\r
- UINT32 BaseMid : 8;\r
- UINT32 Type : 4;\r
- UINT32 System : 1;\r
- UINT32 Dpl : 2;\r
- UINT32 Present : 1;\r
- UINT32 LimitHi : 4;\r
- UINT32 Software : 1;\r
- UINT32 Reserved : 1;\r
- UINT32 DefaultSize : 1;\r
- UINT32 Granularity : 1;\r
- UINT32 BaseHi : 8;\r
+ UINT32 LimitLo : 16;\r
+ UINT32 BaseLo : 16;\r
+ UINT32 BaseMid : 8;\r
+ UINT32 Type : 4;\r
+ UINT32 System : 1;\r
+ UINT32 Dpl : 2;\r
+ UINT32 Present : 1;\r
+ UINT32 LimitHi : 4;\r
+ UINT32 Software : 1;\r
+ UINT32 Reserved : 1;\r
+ UINT32 DefaultSize : 1;\r
+ UINT32 Granularity : 1;\r
+ UINT32 BaseHi : 8;\r
} GDT32;\r
\r
typedef struct {\r
- UINT16 LimitLow;\r
- UINT16 BaseLow;\r
- UINT8 BaseMid;\r
- UINT8 Attribute;\r
- UINT8 LimitHi;\r
- UINT8 BaseHi;\r
+ UINT16 LimitLow;\r
+ UINT16 BaseLow;\r
+ UINT8 BaseMid;\r
+ UINT8 Attribute;\r
+ UINT8 LimitHi;\r
+ UINT8 BaseHi;\r
} GDT64;\r
\r
//\r
// This data structure must be kept in sync with ASM STRUCT in Thunk.inc\r
//\r
typedef struct {\r
- UINT16 Limit;\r
- UINT64 Base;\r
+ UINT16 Limit;\r
+ UINT64 Base;\r
} DESCRIPTOR64;\r
\r
typedef struct {\r
- UINT16 Limit;\r
- UINT32 Base;\r
+ UINT16 Limit;\r
+ UINT32 Base;\r
} DESCRIPTOR32;\r
\r
//\r
// Space for the code\r
// The address of Code is also the beginning of the relocated Thunk code\r
//\r
- CHAR8 Code[4096]; // ?\r
+ CHAR8 Code[4096]; // ?\r
//\r
// The address of the Reverse Thunk code\r
// Note that this member CONTAINS the address of the relocated reverse thunk\r
// code unlike the member variable 'Code', which IS the address of the Thunk\r
// code.\r
//\r
- UINT32 LowReverseThunkStart;\r
+ UINT32 LowReverseThunkStart;\r
\r
//\r
// Data for the code (cs releative)\r
//\r
- DESCRIPTOR32 GdtDesc; // Protected mode GDT\r
- DESCRIPTOR32 IdtDesc; // Protected mode IDT\r
- UINT32 FlatSs;\r
- UINT32 FlatEsp;\r
+ DESCRIPTOR32 GdtDesc; // Protected mode GDT\r
+ DESCRIPTOR32 IdtDesc; // Protected mode IDT\r
+ UINT32 FlatSs;\r
+ UINT32 FlatEsp;\r
\r
- UINT32 LowCodeSelector; // Low code selector in GDT\r
- UINT32 LowDataSelector; // Low data selector in GDT\r
- UINT32 LowStack;\r
- DESCRIPTOR32 RealModeIdtDesc;\r
+ UINT32 LowCodeSelector; // Low code selector in GDT\r
+ UINT32 LowDataSelector; // Low data selector in GDT\r
+ UINT32 LowStack;\r
+ DESCRIPTOR32 RealModeIdtDesc;\r
\r
//\r
// real-mode GDT (temporary GDT with two real mode segment descriptors)\r
//\r
- GDT32 RealModeGdt[NUM_REAL_GDT_ENTRIES];\r
- DESCRIPTOR32 RealModeGdtDesc;\r
+ GDT32 RealModeGdt[NUM_REAL_GDT_ENTRIES];\r
+ DESCRIPTOR32 RealModeGdtDesc;\r
\r
//\r
// Members specifically for the reverse thunk\r
// before performing the reverse thunk. The RevFlat* members must be set\r
// before calling the reverse thunk assembly code.\r
//\r
- UINT16 RevRealDs;\r
- UINT16 RevRealSs;\r
- UINT32 RevRealEsp;\r
- DESCRIPTOR32 RevRealIdtDesc;\r
- UINT16 RevFlatDataSelector; // Flat data selector in GDT\r
- UINT32 RevFlatStack;\r
+ UINT16 RevRealDs;\r
+ UINT16 RevRealSs;\r
+ UINT32 RevRealEsp;\r
+ DESCRIPTOR32 RevRealIdtDesc;\r
+ UINT16 RevFlatDataSelector; // Flat data selector in GDT\r
+ UINT32 RevFlatStack;\r
\r
//\r
// A low memory stack\r
//\r
- CHAR8 Stack[LOW_STACK_SIZE];\r
+ CHAR8 Stack[LOW_STACK_SIZE];\r
\r
//\r
// Stack for flat mode after reverse thunk\r
// @bug - This may no longer be necessary if the reverse thunk interface\r
// is changed to have the flat stack in a different location.\r
//\r
- CHAR8 RevThunkStack[LOW_STACK_SIZE];\r
+ CHAR8 RevThunkStack[LOW_STACK_SIZE];\r
\r
//\r
// Legacy16 Init memory map info\r
//\r
- EFI_TO_COMPATIBILITY16_INIT_TABLE EfiToLegacy16InitTable;\r
+ EFI_TO_COMPATIBILITY16_INIT_TABLE EfiToLegacy16InitTable;\r
\r
- EFI_TO_COMPATIBILITY16_BOOT_TABLE EfiToLegacy16BootTable;\r
+ EFI_TO_COMPATIBILITY16_BOOT_TABLE EfiToLegacy16BootTable;\r
\r
- CHAR8 InterruptRedirectionCode[32];\r
- EFI_LEGACY_INSTALL_PCI_HANDLER PciHandler;\r
- EFI_DISPATCH_OPROM_TABLE DispatchOpromTable;\r
- BBS_TABLE BbsTable[MAX_BBS_ENTRIES];\r
+ CHAR8 InterruptRedirectionCode[32];\r
+ EFI_LEGACY_INSTALL_PCI_HANDLER PciHandler;\r
+ EFI_DISPATCH_OPROM_TABLE DispatchOpromTable;\r
+ BBS_TABLE BbsTable[MAX_BBS_ENTRIES];\r
} LOW_MEMORY_THUNK;\r
\r
#elif defined (MDE_CPU_X64)\r
// Space for the code\r
// The address of Code is also the beginning of the relocated Thunk code\r
//\r
- CHAR8 Code[4096]; // ?\r
+ CHAR8 Code[4096]; // ?\r
\r
//\r
// Data for the code (cs releative)\r
//\r
- DESCRIPTOR64 X64GdtDesc; // Protected mode GDT\r
- DESCRIPTOR64 X64IdtDesc; // Protected mode IDT\r
- UINTN X64Ss;\r
- UINTN X64Esp;\r
+ DESCRIPTOR64 X64GdtDesc; // Protected mode GDT\r
+ DESCRIPTOR64 X64IdtDesc; // Protected mode IDT\r
+ UINTN X64Ss;\r
+ UINTN X64Esp;\r
\r
- UINTN RealStack;\r
- DESCRIPTOR32 RealModeIdtDesc;\r
- DESCRIPTOR32 RealModeGdtDesc;\r
+ UINTN RealStack;\r
+ DESCRIPTOR32 RealModeIdtDesc;\r
+ DESCRIPTOR32 RealModeGdtDesc;\r
\r
//\r
// real-mode GDT (temporary GDT with two real mode segment descriptors)\r
//\r
- GDT64 RealModeGdt[NUM_REAL_GDT_ENTRIES];\r
- UINT64 PageMapLevel4;\r
+ GDT64 RealModeGdt[NUM_REAL_GDT_ENTRIES];\r
+ UINT64 PageMapLevel4;\r
\r
//\r
// A low memory stack\r
//\r
- CHAR8 Stack[LOW_STACK_SIZE];\r
+ CHAR8 Stack[LOW_STACK_SIZE];\r
\r
//\r
// Legacy16 Init memory map info\r
//\r
- EFI_TO_COMPATIBILITY16_INIT_TABLE EfiToLegacy16InitTable;\r
+ EFI_TO_COMPATIBILITY16_INIT_TABLE EfiToLegacy16InitTable;\r
\r
- EFI_TO_COMPATIBILITY16_BOOT_TABLE EfiToLegacy16BootTable;\r
+ EFI_TO_COMPATIBILITY16_BOOT_TABLE EfiToLegacy16BootTable;\r
\r
- CHAR8 InterruptRedirectionCode[32];\r
- EFI_LEGACY_INSTALL_PCI_HANDLER PciHandler;\r
- EFI_DISPATCH_OPROM_TABLE DispatchOpromTable;\r
- BBS_TABLE BbsTable[MAX_BBS_ENTRIES];\r
+ CHAR8 InterruptRedirectionCode[32];\r
+ EFI_LEGACY_INSTALL_PCI_HANDLER PciHandler;\r
+ EFI_DISPATCH_OPROM_TABLE DispatchOpromTable;\r
+ BBS_TABLE BbsTable[MAX_BBS_ENTRIES];\r
} LOW_MEMORY_THUNK;\r
\r
#endif\r
// PnP Expansion Header\r
//\r
typedef struct {\r
- UINT32 PnpSignature;\r
- UINT8 Revision;\r
- UINT8 Length;\r
- UINT16 NextHeader;\r
- UINT8 Reserved1;\r
- UINT8 Checksum;\r
- UINT32 DeviceId;\r
- UINT16 MfgPointer;\r
- UINT16 ProductNamePointer;\r
- UINT8 Class;\r
- UINT8 SubClass;\r
- UINT8 Interface;\r
- UINT8 DeviceIndicators;\r
- UINT16 Bcv;\r
- UINT16 DisconnectVector;\r
- UINT16 Bev;\r
- UINT16 Reserved2;\r
- UINT16 StaticResourceVector;\r
+ UINT32 PnpSignature;\r
+ UINT8 Revision;\r
+ UINT8 Length;\r
+ UINT16 NextHeader;\r
+ UINT8 Reserved1;\r
+ UINT8 Checksum;\r
+ UINT32 DeviceId;\r
+ UINT16 MfgPointer;\r
+ UINT16 ProductNamePointer;\r
+ UINT8 Class;\r
+ UINT8 SubClass;\r
+ UINT8 Interface;\r
+ UINT8 DeviceIndicators;\r
+ UINT16 Bcv;\r
+ UINT16 DisconnectVector;\r
+ UINT16 Bev;\r
+ UINT16 Reserved2;\r
+ UINT16 StaticResourceVector;\r
} LEGACY_PNP_EXPANSION_HEADER;\r
\r
typedef struct {\r
- UINT8 PciSegment;\r
- UINT8 PciBus;\r
- UINT8 PciDevice;\r
- UINT8 PciFunction;\r
- UINT16 Vid;\r
- UINT16 Did;\r
- UINT16 SysSid;\r
- UINT16 SVid;\r
- UINT8 Class;\r
- UINT8 SubClass;\r
- UINT8 Interface;\r
- UINT8 Reserved;\r
- UINTN RomStart;\r
- UINTN ManufacturerString;\r
- UINTN ProductNameString;\r
+ UINT8 PciSegment;\r
+ UINT8 PciBus;\r
+ UINT8 PciDevice;\r
+ UINT8 PciFunction;\r
+ UINT16 Vid;\r
+ UINT16 Did;\r
+ UINT16 SysSid;\r
+ UINT16 SVid;\r
+ UINT8 Class;\r
+ UINT8 SubClass;\r
+ UINT8 Interface;\r
+ UINT8 Reserved;\r
+ UINTN RomStart;\r
+ UINTN ManufacturerString;\r
+ UINTN ProductNameString;\r
} LEGACY_ROM_AND_BBS_TABLE;\r
\r
//\r
// This mapping is ignored booting to a legacy OS.\r
//\r
typedef struct {\r
- UINT8 PciSegment;\r
- UINT8 PciBus;\r
- UINT8 PciDevice;\r
- UINT8 PciFunction;\r
- UINT8 StartDriveNumber;\r
- UINT8 EndDriveNumber;\r
+ UINT8 PciSegment;\r
+ UINT8 PciBus;\r
+ UINT8 PciDevice;\r
+ UINT8 PciFunction;\r
+ UINT8 StartDriveNumber;\r
+ UINT8 EndDriveNumber;\r
} LEGACY_EFI_HDD_TABLE;\r
\r
//\r
// This data is passed to Leacy16Boot\r
//\r
typedef enum {\r
- EfiAcpiAddressRangeMemory = 1,\r
- EfiAcpiAddressRangeReserved = 2,\r
- EfiAcpiAddressRangeACPI = 3,\r
- EfiAcpiAddressRangeNVS = 4,\r
+ EfiAcpiAddressRangeMemory = 1,\r
+ EfiAcpiAddressRangeReserved = 2,\r
+ EfiAcpiAddressRangeACPI = 3,\r
+ EfiAcpiAddressRangeNVS = 4,\r
EfiAddressRangePersistentMemory = 7\r
} EFI_ACPI_MEMORY_TYPE;\r
\r
typedef struct {\r
- UINT64 BaseAddr;\r
- UINT64 Length;\r
- EFI_ACPI_MEMORY_TYPE Type;\r
+ UINT64 BaseAddr;\r
+ UINT64 Length;\r
+ EFI_ACPI_MEMORY_TYPE Type;\r
} EFI_E820_ENTRY64;\r
\r
typedef struct {\r
- UINT32 BassAddrLow;\r
- UINT32 BaseAddrHigh;\r
- UINT32 LengthLow;\r
- UINT32 LengthHigh;\r
- EFI_ACPI_MEMORY_TYPE Type;\r
+ UINT32 BassAddrLow;\r
+ UINT32 BaseAddrHigh;\r
+ UINT32 LengthLow;\r
+ UINT32 LengthHigh;\r
+ EFI_ACPI_MEMORY_TYPE Type;\r
} EFI_E820_ENTRY;\r
\r
#pragma pack()\r
\r
-extern BBS_TABLE *mBbsTable;\r
-\r
-extern EFI_GENERIC_MEMORY_TEST_PROTOCOL *gGenMemoryTest;\r
-\r
-extern BOOLEAN mEndOfDxe;\r
-\r
-#define PORT_70 0x70\r
-#define PORT_71 0x71\r
-\r
-#define CMOS_0A 0x0a ///< Status register A\r
-#define CMOS_0D 0x0d ///< Status register D\r
-#define CMOS_0E 0x0e ///< Diagnostic Status\r
-#define CMOS_0F 0x0f ///< Shutdown status\r
-#define CMOS_10 0x10 ///< Floppy type\r
-#define CMOS_12 0x12 ///< IDE type\r
-#define CMOS_14 0x14 ///< Same as BDA 40:10\r
-#define CMOS_15 0x15 ///< Low byte of base memory in 1k increments\r
-#define CMOS_16 0x16 ///< High byte of base memory in 1k increments\r
-#define CMOS_17 0x17 ///< Low byte of 1MB+ memory in 1k increments - max 15 MB\r
-#define CMOS_18 0x18 ///< High byte of 1MB+ memory in 1k increments - max 15 MB\r
-#define CMOS_19 0x19 ///< C: extended drive type\r
-#define CMOS_1A 0x1a ///< D: extended drive type\r
-#define CMOS_2E 0x2e ///< Most significient byte of standard checksum\r
-#define CMOS_2F 0x2f ///< Least significient byte of standard checksum\r
-#define CMOS_30 0x30 ///< CMOS 0x17\r
-#define CMOS_31 0x31 ///< CMOS 0x18\r
-#define CMOS_32 0x32 ///< Century byte\r
+extern BBS_TABLE *mBbsTable;\r
+\r
+extern EFI_GENERIC_MEMORY_TEST_PROTOCOL *gGenMemoryTest;\r
+\r
+extern BOOLEAN mEndOfDxe;\r
+\r
+#define PORT_70 0x70\r
+#define PORT_71 0x71\r
+\r
+#define CMOS_0A 0x0a ///< Status register A\r
+#define CMOS_0D 0x0d ///< Status register D\r
+#define CMOS_0E 0x0e ///< Diagnostic Status\r
+#define CMOS_0F 0x0f ///< Shutdown status\r
+#define CMOS_10 0x10 ///< Floppy type\r
+#define CMOS_12 0x12 ///< IDE type\r
+#define CMOS_14 0x14 ///< Same as BDA 40:10\r
+#define CMOS_15 0x15 ///< Low byte of base memory in 1k increments\r
+#define CMOS_16 0x16 ///< High byte of base memory in 1k increments\r
+#define CMOS_17 0x17 ///< Low byte of 1MB+ memory in 1k increments - max 15 MB\r
+#define CMOS_18 0x18 ///< High byte of 1MB+ memory in 1k increments - max 15 MB\r
+#define CMOS_19 0x19 ///< C: extended drive type\r
+#define CMOS_1A 0x1a ///< D: extended drive type\r
+#define CMOS_2E 0x2e ///< Most significient byte of standard checksum\r
+#define CMOS_2F 0x2f ///< Least significient byte of standard checksum\r
+#define CMOS_30 0x30 ///< CMOS 0x17\r
+#define CMOS_31 0x31 ///< CMOS 0x18\r
+#define CMOS_32 0x32 ///< Century byte\r
\r
//\r
// 8254 Timer registers\r
//\r
-#define TIMER0_COUNT_PORT 0x40\r
-#define TIMER1_COUNT_PORT 0x41\r
-#define TIMER2_COUNT_PORT 0x42\r
-#define TIMER_CONTROL_PORT 0x43\r
+#define TIMER0_COUNT_PORT 0x40\r
+#define TIMER1_COUNT_PORT 0x41\r
+#define TIMER2_COUNT_PORT 0x42\r
+#define TIMER_CONTROL_PORT 0x43\r
\r
//\r
// Timer 0, Read/Write LSB then MSB, Square wave output, binary count use.\r
//\r
-#define TIMER0_CONTROL_WORD 0x36\r
+#define TIMER0_CONTROL_WORD 0x36\r
\r
#define LEGACY_BIOS_INSTANCE_SIGNATURE SIGNATURE_32 ('L', 'B', 'I', 'T')\r
typedef struct {\r
- UINTN Signature;\r
+ UINTN Signature;\r
\r
- EFI_HANDLE Handle;\r
- EFI_LEGACY_BIOS_PROTOCOL LegacyBios;\r
+ EFI_HANDLE Handle;\r
+ EFI_LEGACY_BIOS_PROTOCOL LegacyBios;\r
\r
- EFI_HANDLE ImageHandle;\r
+ EFI_HANDLE ImageHandle;\r
\r
//\r
// CPU Architectural Protocol\r
//\r
- EFI_CPU_ARCH_PROTOCOL *Cpu;\r
+ EFI_CPU_ARCH_PROTOCOL *Cpu;\r
\r
//\r
// Timer Architectural Protocol\r
//\r
- EFI_TIMER_ARCH_PROTOCOL *Timer;\r
- BOOLEAN TimerUses8254;\r
+ EFI_TIMER_ARCH_PROTOCOL *Timer;\r
+ BOOLEAN TimerUses8254;\r
\r
//\r
// Protocol to Lock and Unlock 0xc0000 - 0xfffff\r
//\r
- EFI_LEGACY_REGION2_PROTOCOL *LegacyRegion;\r
+ EFI_LEGACY_REGION2_PROTOCOL *LegacyRegion;\r
\r
- EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *LegacyBiosPlatform;\r
+ EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *LegacyBiosPlatform;\r
\r
//\r
// Interrupt control for thunk and PCI IRQ\r
//\r
- EFI_LEGACY_8259_PROTOCOL *Legacy8259;\r
+ EFI_LEGACY_8259_PROTOCOL *Legacy8259;\r
\r
//\r
// PCI Interrupt PIRQ control\r
//\r
- EFI_LEGACY_INTERRUPT_PROTOCOL *LegacyInterrupt;\r
+ EFI_LEGACY_INTERRUPT_PROTOCOL *LegacyInterrupt;\r
\r
//\r
// Generic Memory Test\r
//\r
- EFI_GENERIC_MEMORY_TEST_PROTOCOL *GenericMemoryTest;\r
+ EFI_GENERIC_MEMORY_TEST_PROTOCOL *GenericMemoryTest;\r
\r
//\r
// TRUE if PCI Interrupt Line registers have been programmed.\r
//\r
- BOOLEAN PciInterruptLine;\r
+ BOOLEAN PciInterruptLine;\r
\r
//\r
// Code space below 1MB needed by thunker to transition to real mode.\r
// Contains stack and real mode code fragments\r
//\r
- LOW_MEMORY_THUNK *IntThunk;\r
+ LOW_MEMORY_THUNK *IntThunk;\r
\r
//\r
// Starting shadow address of the Legacy BIOS\r
//\r
- UINT32 BiosStart;\r
- UINT32 LegacyBiosImageSize;\r
+ UINT32 BiosStart;\r
+ UINT32 LegacyBiosImageSize;\r
\r
//\r
// Start of variables used by CsmItp.mac ITP macro file and/os LegacyBios\r
//\r
- UINT8 Dump[4];\r
+ UINT8 Dump[4];\r
\r
//\r
// $EFI Legacy16 code entry info in memory < 1 MB;\r
//\r
- EFI_COMPATIBILITY16_TABLE *Legacy16Table;\r
- VOID *Legacy16InitPtr;\r
- VOID *Legacy16BootPtr;\r
- VOID *InternalIrqRoutingTable;\r
- UINT32 NumberIrqRoutingEntries;\r
- VOID *BbsTablePtr;\r
- VOID *HddTablePtr;\r
- UINT32 NumberHddControllers;\r
+ EFI_COMPATIBILITY16_TABLE *Legacy16Table;\r
+ VOID *Legacy16InitPtr;\r
+ VOID *Legacy16BootPtr;\r
+ VOID *InternalIrqRoutingTable;\r
+ UINT32 NumberIrqRoutingEntries;\r
+ VOID *BbsTablePtr;\r
+ VOID *HddTablePtr;\r
+ UINT32 NumberHddControllers;\r
\r
//\r
// Cached copy of Legacy16 entry point\r
//\r
- UINT16 Legacy16CallSegment;\r
- UINT16 Legacy16CallOffset;\r
+ UINT16 Legacy16CallSegment;\r
+ UINT16 Legacy16CallOffset;\r
\r
//\r
// Returned from $EFI and passed in to OPROMS\r
//\r
- UINT16 PnPInstallationCheckSegment;\r
- UINT16 PnPInstallationCheckOffset;\r
+ UINT16 PnPInstallationCheckSegment;\r
+ UINT16 PnPInstallationCheckOffset;\r
\r
//\r
// E820 table\r
//\r
- EFI_E820_ENTRY E820Table[EFI_MAX_E820_ENTRY];\r
- UINT32 NumberE820Entries;\r
+ EFI_E820_ENTRY E820Table[EFI_MAX_E820_ENTRY];\r
+ UINT32 NumberE820Entries;\r
\r
//\r
// True if legacy VGA INT 10h handler installed\r
//\r
- BOOLEAN VgaInstalled;\r
+ BOOLEAN VgaInstalled;\r
\r
//\r
// Number of IDE drives\r
//\r
- UINT8 IdeDriveCount;\r
+ UINT8 IdeDriveCount;\r
\r
//\r
// Current Free Option ROM space. An option ROM must NOT go past\r
// BiosStart.\r
//\r
- UINT32 OptionRom;\r
+ UINT32 OptionRom;\r
\r
//\r
// Save Legacy16 unexpected interrupt vector. Reprogram INT 68-6F from\r
// EFI values to legacy value just before boot.\r
//\r
- UINT32 BiosUnexpectedInt;\r
- UINT32 ThunkSavedInt[8];\r
- UINT16 ThunkSeg;\r
- LEGACY_EFI_HDD_TABLE *LegacyEfiHddTable;\r
- UINT16 LegacyEfiHddTableIndex;\r
- UINT8 DiskEnd;\r
- UINT8 Disk4075;\r
- UINT16 TraceIndex;\r
- UINT16 Trace[0x200];\r
+ UINT32 BiosUnexpectedInt;\r
+ UINT32 ThunkSavedInt[8];\r
+ UINT16 ThunkSeg;\r
+ LEGACY_EFI_HDD_TABLE *LegacyEfiHddTable;\r
+ UINT16 LegacyEfiHddTableIndex;\r
+ UINT8 DiskEnd;\r
+ UINT8 Disk4075;\r
+ UINT16 TraceIndex;\r
+ UINT16 Trace[0x200];\r
\r
//\r
// Indicate that whether GenericLegacyBoot is entered or not\r
//\r
- BOOLEAN LegacyBootEntered;\r
+ BOOLEAN LegacyBootEntered;\r
\r
//\r
// CSM16 PCI Interface Version\r
//\r
- UINT16 Csm16PciInterfaceVersion;\r
-\r
+ UINT16 Csm16PciInterfaceVersion;\r
} LEGACY_BIOS_INSTANCE;\r
\r
-\r
#pragma pack(1)\r
\r
/*\r
40:98-101 skip\r
*/\r
typedef struct {\r
- UINT16 Com1;\r
- UINT16 Com2;\r
- UINT16 Com3;\r
- UINT16 Com4;\r
- UINT16 Lpt1;\r
- UINT16 Lpt2;\r
- UINT16 Lpt3;\r
- UINT16 Ebda;\r
- UINT16 MachineConfig;\r
- UINT8 Bda12;\r
- UINT16 MemSize;\r
- UINT8 Bda15_16[0x02];\r
- UINT8 ShiftStatus;\r
- UINT8 Bda18_19[0x02];\r
- UINT16 KeyHead;\r
- UINT16 KeyTail;\r
- UINT16 Bda1E_3D[0x10];\r
- UINT16 FloppyData;\r
- UINT8 FloppyTimeout;\r
- UINT8 Bda41_74[0x34];\r
- UINT8 NumberOfDrives;\r
- UINT8 Bda76_77[0x02];\r
- UINT16 Lpt1_2Timeout;\r
- UINT16 Lpt3_4Timeout;\r
- UINT16 Com1_2Timeout;\r
- UINT16 Com3_4Timeout;\r
- UINT16 KeyStart;\r
- UINT16 KeyEnd;\r
- UINT8 Bda84_87[0x4];\r
- UINT8 DataXmit;\r
- UINT8 Bda89_8F[0x07];\r
- UINT8 FloppyXRate;\r
- UINT8 Bda91_95[0x05];\r
- UINT8 KeyboardStatus;\r
- UINT8 LedStatus;\r
+ UINT16 Com1;\r
+ UINT16 Com2;\r
+ UINT16 Com3;\r
+ UINT16 Com4;\r
+ UINT16 Lpt1;\r
+ UINT16 Lpt2;\r
+ UINT16 Lpt3;\r
+ UINT16 Ebda;\r
+ UINT16 MachineConfig;\r
+ UINT8 Bda12;\r
+ UINT16 MemSize;\r
+ UINT8 Bda15_16[0x02];\r
+ UINT8 ShiftStatus;\r
+ UINT8 Bda18_19[0x02];\r
+ UINT16 KeyHead;\r
+ UINT16 KeyTail;\r
+ UINT16 Bda1E_3D[0x10];\r
+ UINT16 FloppyData;\r
+ UINT8 FloppyTimeout;\r
+ UINT8 Bda41_74[0x34];\r
+ UINT8 NumberOfDrives;\r
+ UINT8 Bda76_77[0x02];\r
+ UINT16 Lpt1_2Timeout;\r
+ UINT16 Lpt3_4Timeout;\r
+ UINT16 Com1_2Timeout;\r
+ UINT16 Com3_4Timeout;\r
+ UINT16 KeyStart;\r
+ UINT16 KeyEnd;\r
+ UINT8 Bda84_87[0x4];\r
+ UINT8 DataXmit;\r
+ UINT8 Bda89_8F[0x07];\r
+ UINT8 FloppyXRate;\r
+ UINT8 Bda91_95[0x05];\r
+ UINT8 KeyboardStatus;\r
+ UINT8 LedStatus;\r
} BDA_STRUC;\r
#pragma pack()\r
\r
BOOLEAN\r
EFIAPI\r
LegacyBiosInt86 (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN UINT8 BiosInt,\r
- IN EFI_IA32_REGISTER_SET *Regs\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN UINT8 BiosInt,\r
+ IN EFI_IA32_REGISTER_SET *Regs\r
);\r
\r
-\r
/**\r
Thunk to 16-bit real mode and call Segment:Offset. Regs will contain the\r
16-bit register context on entry and exit. Arguments can be passed on\r
BOOLEAN\r
EFIAPI\r
LegacyBiosFarCall86 (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN UINT16 Segment,\r
- IN UINT16 Offset,\r
- IN EFI_IA32_REGISTER_SET *Regs,\r
- IN VOID *Stack,\r
- IN UINTN StackSize\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN UINT16 Segment,\r
+ IN UINT16 Offset,\r
+ IN EFI_IA32_REGISTER_SET *Regs,\r
+ IN VOID *Stack,\r
+ IN UINTN StackSize\r
);\r
\r
-\r
/**\r
Test to see if a legacy PCI ROM exists for this device. Optionally return\r
the Legacy ROM instance for this PCI device.\r
EFI_STATUS\r
EFIAPI\r
LegacyBiosCheckPciRom (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN EFI_HANDLE PciHandle,\r
- OUT VOID **RomImage OPTIONAL,\r
- OUT UINTN *RomSize OPTIONAL,\r
- OUT UINTN *Flags\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN EFI_HANDLE PciHandle,\r
+ OUT VOID **RomImage OPTIONAL,\r
+ OUT UINTN *RomSize OPTIONAL,\r
+ OUT UINTN *Flags\r
);\r
\r
-\r
/**\r
Assign drive number to legacy HDD drives prior to booting an EFI\r
aware OS so the OS can access drives without an EFI driver.\r
EFI_STATUS\r
EFIAPI\r
LegacyBiosPrepareToBootEfi (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- OUT UINT16 *BbsCount,\r
- OUT BBS_TABLE **BbsTable\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ OUT UINT16 *BbsCount,\r
+ OUT BBS_TABLE **BbsTable\r
);\r
\r
-\r
/**\r
To boot from an unconventional device like parties and/or execute\r
HDD diagnostics.\r
EFI_STATUS\r
EFIAPI\r
LegacyBiosBootUnconventionalDevice (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN UDC_ATTRIBUTES Attributes,\r
- IN UINTN BbsEntry,\r
- IN VOID *BeerData,\r
- IN VOID *ServiceAreaData\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN UDC_ATTRIBUTES Attributes,\r
+ IN UINTN BbsEntry,\r
+ IN VOID *BeerData,\r
+ IN VOID *ServiceAreaData\r
);\r
\r
-\r
/**\r
Load a legacy PC-AT OPROM on the PciHandle device. Return information\r
about how many disks were added by the OPROM and the shadow address and\r
EFI_STATUS\r
EFIAPI\r
LegacyBiosInstallPciRom (\r
- IN EFI_LEGACY_BIOS_PROTOCOL * This,\r
- IN EFI_HANDLE PciHandle,\r
- IN VOID **RomImage,\r
- OUT UINTN *Flags,\r
- OUT UINT8 *DiskStart OPTIONAL,\r
- OUT UINT8 *DiskEnd OPTIONAL,\r
- OUT VOID **RomShadowAddress OPTIONAL,\r
- OUT UINT32 *RomShadowedSize OPTIONAL\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN EFI_HANDLE PciHandle,\r
+ IN VOID **RomImage,\r
+ OUT UINTN *Flags,\r
+ OUT UINT8 *DiskStart OPTIONAL,\r
+ OUT UINT8 *DiskEnd OPTIONAL,\r
+ OUT VOID **RomShadowAddress OPTIONAL,\r
+ OUT UINT32 *RomShadowedSize OPTIONAL\r
);\r
\r
-\r
/**\r
Fill in the standard BDA for Keyboard LEDs\r
\r
EFI_STATUS\r
EFIAPI\r
LegacyBiosUpdateKeyboardLedStatus (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN UINT8 Leds\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN UINT8 Leds\r
);\r
\r
-\r
/**\r
Get all BBS info\r
\r
EFI_STATUS\r
EFIAPI\r
LegacyBiosGetBbsInfo (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- OUT UINT16 *HddCount,\r
- OUT HDD_INFO **HddInfo,\r
- OUT UINT16 *BbsCount,\r
- OUT BBS_TABLE **BbsTable\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ OUT UINT16 *HddCount,\r
+ OUT HDD_INFO **HddInfo,\r
+ OUT UINT16 *BbsCount,\r
+ OUT BBS_TABLE **BbsTable\r
);\r
\r
-\r
/**\r
Shadow all legacy16 OPROMs that haven't been shadowed.\r
Warning: Use this with caution. This routine disconnects all EFI\r
EFI_STATUS\r
EFIAPI\r
LegacyBiosShadowAllLegacyOproms (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This\r
);\r
\r
-\r
/**\r
Attempt to legacy boot the BootOption. If the EFI contexted has been\r
compromised this function will not return.\r
EFI_STATUS\r
EFIAPI\r
LegacyBiosLegacyBoot (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN BBS_BBS_DEVICE_PATH *BbsDevicePath,\r
- IN UINT32 LoadOptionsSize,\r
- IN VOID *LoadOptions\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN BBS_BBS_DEVICE_PATH *BbsDevicePath,\r
+ IN UINT32 LoadOptionsSize,\r
+ IN VOID *LoadOptions\r
);\r
\r
-\r
/**\r
Allocate memory < 1 MB and copy the thunker code into low memory. Se up\r
all the descriptors.\r
**/\r
EFI_STATUS\r
LegacyBiosInitializeThunk (\r
- IN LEGACY_BIOS_INSTANCE *Private\r
+ IN LEGACY_BIOS_INSTANCE *Private\r
);\r
\r
-\r
/**\r
Fill in the standard BDA and EBDA stuff before Legacy16 load\r
\r
**/\r
EFI_STATUS\r
LegacyBiosInitBda (\r
- IN LEGACY_BIOS_INSTANCE *Private\r
+ IN LEGACY_BIOS_INSTANCE *Private\r
);\r
\r
-\r
/**\r
Collect IDE Inquiry data from the IDE disks\r
\r
**/\r
EFI_STATUS\r
LegacyBiosBuildIdeData (\r
- IN LEGACY_BIOS_INSTANCE *Private,\r
- IN HDD_INFO **HddInfo,\r
- IN UINT16 Flag\r
+ IN LEGACY_BIOS_INSTANCE *Private,\r
+ IN HDD_INFO **HddInfo,\r
+ IN UINT16 Flag\r
);\r
\r
-\r
/**\r
Enable ide controller. This gets disabled when LegacyBoot.c is about\r
to run the Option ROMs.\r
**/\r
VOID\r
EnableIdeController (\r
- IN LEGACY_BIOS_INSTANCE *Private\r
+ IN LEGACY_BIOS_INSTANCE *Private\r
);\r
\r
-\r
/**\r
If the IDE channel is in compatibility (legacy) mode, remove all\r
PCI I/O BAR addresses from the controller.\r
**/\r
VOID\r
InitLegacyIdeController (\r
- IN EFI_HANDLE IdeController\r
+ IN EFI_HANDLE IdeController\r
);\r
\r
-\r
/**\r
Program the interrupt routing register in all the PCI devices. On a PC AT system\r
this register contains the 8259 IRQ vector that matches its PCI interrupt.\r
**/\r
EFI_STATUS\r
PciProgramAllInterruptLineRegisters (\r
- IN LEGACY_BIOS_INSTANCE *Private\r
+ IN LEGACY_BIOS_INSTANCE *Private\r
);\r
\r
-\r
/**\r
Collect EFI Info about legacy devices.\r
\r
**/\r
EFI_STATUS\r
LegacyBiosBuildSioData (\r
- IN LEGACY_BIOS_INSTANCE *Private\r
+ IN LEGACY_BIOS_INSTANCE *Private\r
);\r
\r
-\r
/**\r
Shadow all the PCI legacy ROMs. Use data from the Legacy BIOS Protocol\r
to chose the order. Skip any devices that have already have legacy\r
**/\r
EFI_STATUS\r
PciShadowRoms (\r
- IN LEGACY_BIOS_INSTANCE *Private\r
+ IN LEGACY_BIOS_INSTANCE *Private\r
);\r
\r
-\r
/**\r
Fill in the standard BDA and EBDA stuff prior to legacy Boot\r
\r
**/\r
EFI_STATUS\r
LegacyBiosCompleteBdaBeforeBoot (\r
- IN LEGACY_BIOS_INSTANCE *Private\r
+ IN LEGACY_BIOS_INSTANCE *Private\r
);\r
\r
-\r
/**\r
Fill in the standard CMOS stuff before Legacy16 load\r
\r
**/\r
EFI_STATUS\r
LegacyBiosInitCmos (\r
- IN LEGACY_BIOS_INSTANCE *Private\r
+ IN LEGACY_BIOS_INSTANCE *Private\r
);\r
\r
-\r
/**\r
Fill in the standard CMOS stuff prior to legacy Boot\r
\r
**/\r
EFI_STATUS\r
LegacyBiosCompleteStandardCmosBeforeBoot (\r
- IN LEGACY_BIOS_INSTANCE *Private\r
+ IN LEGACY_BIOS_INSTANCE *Private\r
);\r
\r
-\r
/**\r
Contains the code that is copied into low memory (below 640K).\r
This code reflects interrupts 0x68-0x6f to interrupts 0x08-0x0f.\r
VOID\r
);\r
\r
-\r
/**\r
Build the E820 table.\r
\r
**/\r
EFI_STATUS\r
LegacyBiosBuildE820 (\r
- IN LEGACY_BIOS_INSTANCE *Private,\r
- OUT UINTN *Size\r
+ IN LEGACY_BIOS_INSTANCE *Private,\r
+ OUT UINTN *Size\r
);\r
\r
/**\r
**/\r
VOID\r
ShutdownAPs (\r
- IN LEGACY_BIOS_INSTANCE *Private\r
+ IN LEGACY_BIOS_INSTANCE *Private\r
);\r
\r
/**\r
**/\r
VOID\r
GetRegisters (\r
- LOW_MEMORY_THUNK *IntThunk\r
+ LOW_MEMORY_THUNK *IntThunk\r
);\r
\r
/**\r
**/\r
UINTN\r
CallRealThunkCode (\r
- UINT8 *RealCode,\r
- UINT8 BiosInt,\r
- UINT32 CallAddress\r
+ UINT8 *RealCode,\r
+ UINT8 BiosInt,\r
+ UINT32 CallAddress\r
);\r
\r
/**\r
**/\r
VOID\r
GenerateSoftInit (\r
- UINT8 Vector\r
+ UINT8 Vector\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
AllocateLegacyMemory (\r
- IN EFI_ALLOCATE_TYPE AllocateType,\r
- IN EFI_MEMORY_TYPE MemoryType,\r
- IN EFI_PHYSICAL_ADDRESS StartPageAddress,\r
- IN UINTN Pages,\r
- OUT EFI_PHYSICAL_ADDRESS *Result\r
+ IN EFI_ALLOCATE_TYPE AllocateType,\r
+ IN EFI_MEMORY_TYPE MemoryType,\r
+ IN EFI_PHYSICAL_ADDRESS StartPageAddress,\r
+ IN UINTN Pages,\r
+ OUT EFI_PHYSICAL_ADDRESS *Result\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
LegacyBiosGetLegacyRegion (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN UINTN LegacyMemorySize,\r
- IN UINTN Region,\r
- IN UINTN Alignment,\r
- OUT VOID **LegacyMemoryAddress\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN UINTN LegacyMemorySize,\r
+ IN UINTN Region,\r
+ IN UINTN Alignment,\r
+ OUT VOID **LegacyMemoryAddress\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
LegacyBiosCopyLegacyRegion (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN UINTN LegacyMemorySize,\r
- IN VOID *LegacyMemoryAddress,\r
- IN VOID *LegacyMemorySourceAddress\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN UINTN LegacyMemorySize,\r
+ IN VOID *LegacyMemoryAddress,\r
+ IN VOID *LegacyMemorySourceAddress\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
CalculateIdentifyDriveChecksum (\r
- IN UINT8 *IdentifyDriveData,\r
- OUT UINT8 *Checksum\r
+ IN UINT8 *IdentifyDriveData,\r
+ OUT UINT8 *Checksum\r
);\r
\r
/**\r
**/\r
VOID\r
UpdateIdentifyDriveData (\r
- IN UINT8 *IdentifyDriveData\r
+ IN UINT8 *IdentifyDriveData\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
LegacyBiosBuildBbs (\r
- IN LEGACY_BIOS_INSTANCE *Private,\r
- IN BBS_TABLE *BbsTable\r
+ IN LEGACY_BIOS_INSTANCE *Private,\r
+ IN BBS_TABLE *BbsTable\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
LegacyBiosCheckPciRomEx (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN EFI_HANDLE PciHandle,\r
- OUT VOID **RomImage OPTIONAL,\r
- OUT UINTN *RomSize OPTIONAL,\r
- OUT UINTN *RuntimeImageLength OPTIONAL,\r
- OUT UINTN *Flags OPTIONAL,\r
- OUT UINT8 *OpromRevision OPTIONAL,\r
- OUT VOID **ConfigUtilityCodeHeader OPTIONAL\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN EFI_HANDLE PciHandle,\r
+ OUT VOID **RomImage OPTIONAL,\r
+ OUT UINTN *RomSize OPTIONAL,\r
+ OUT UINTN *RuntimeImageLength OPTIONAL,\r
+ OUT UINTN *Flags OPTIONAL,\r
+ OUT UINT8 *OpromRevision OPTIONAL,\r
+ OUT VOID **ConfigUtilityCodeHeader OPTIONAL\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
RelocateImageUnder4GIfNeeded (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
);\r
\r
/**\r
BOOLEAN\r
EFIAPI\r
InternalLegacyBiosFarCall (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN UINT16 Segment,\r
- IN UINT16 Offset,\r
- IN EFI_IA32_REGISTER_SET *Regs,\r
- IN VOID *Stack,\r
- IN UINTN StackSize\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN UINT16 Segment,\r
+ IN UINT16 Offset,\r
+ IN EFI_IA32_REGISTER_SET *Regs,\r
+ IN VOID *Stack,\r
+ IN UINTN StackSize\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
LegacyBiosInstallVgaRom (\r
- IN LEGACY_BIOS_INSTANCE *Private\r
+ IN LEGACY_BIOS_INSTANCE *Private\r
);\r
\r
#endif\r
projects / mirror_edk2.git / blobdiff