//\r
// Subsystem Device IDs (to be) introduced in VirtIo 1.0\r
//\r
-#define VIRTIO_SUBSYSTEM_GPU_DEVICE 16\r
+#define VIRTIO_SUBSYSTEM_GPU_DEVICE 16\r
//\r
// Subsystem Device IDs from the VirtIo spec at git commit 87fa6b5d8155;\r
// <https://github.com/oasis-tcs/virtio-spec/tree/87fa6b5d8155>.\r
//\r
-#define VIRTIO_SUBSYSTEM_FILESYSTEM 26\r
+#define VIRTIO_SUBSYSTEM_FILESYSTEM 26\r
\r
//\r
// Structures for parsing the VirtIo 1.0 specific PCI capabilities from the\r
//\r
#pragma pack (1)\r
typedef struct {\r
- EFI_PCI_CAPABILITY_VENDOR_HDR VendorHdr;\r
- UINT8 ConfigType; // Identifies the specific VirtIo 1.0 config structure\r
- UINT8 Bar; // The BAR that contains the structure\r
- UINT8 Padding[3];\r
- UINT32 Offset; // Offset within Bar until the start of the structure\r
- UINT32 Length; // Length of the structure\r
+ EFI_PCI_CAPABILITY_VENDOR_HDR VendorHdr;\r
+ UINT8 ConfigType; // Identifies the specific VirtIo 1.0 config structure\r
+ UINT8 Bar; // The BAR that contains the structure\r
+ UINT8 Padding[3];\r
+ UINT32 Offset; // Offset within Bar until the start of the structure\r
+ UINT32 Length; // Length of the structure\r
} VIRTIO_PCI_CAP;\r
#pragma pack ()\r
\r
//\r
// Values for the VIRTIO_PCI_CAP.ConfigType field\r
//\r
-#define VIRTIO_PCI_CAP_COMMON_CFG 1 // Common configuration\r
-#define VIRTIO_PCI_CAP_NOTIFY_CFG 2 // Notifications\r
-#define VIRTIO_PCI_CAP_DEVICE_CFG 4 // Device specific configuration\r
+#define VIRTIO_PCI_CAP_COMMON_CFG 1 // Common configuration\r
+#define VIRTIO_PCI_CAP_NOTIFY_CFG 2 // Notifications\r
+#define VIRTIO_PCI_CAP_DEVICE_CFG 4 // Device specific configuration\r
\r
//\r
// Structure pointed-to by Bar and Offset in VIRTIO_PCI_CAP when ConfigType is\r
//\r
#pragma pack (1)\r
typedef struct {\r
- UINT32 DeviceFeatureSelect;\r
- UINT32 DeviceFeature;\r
- UINT32 DriverFeatureSelect;\r
- UINT32 DriverFeature;\r
- UINT16 MsixConfig;\r
- UINT16 NumQueues;\r
- UINT8 DeviceStatus;\r
- UINT8 ConfigGeneration;\r
- UINT16 QueueSelect;\r
- UINT16 QueueSize;\r
- UINT16 QueueMsixVector;\r
- UINT16 QueueEnable;\r
- UINT16 QueueNotifyOff;\r
- UINT64 QueueDesc;\r
- UINT64 QueueAvail;\r
- UINT64 QueueUsed;\r
+ UINT32 DeviceFeatureSelect;\r
+ UINT32 DeviceFeature;\r
+ UINT32 DriverFeatureSelect;\r
+ UINT32 DriverFeature;\r
+ UINT16 MsixConfig;\r
+ UINT16 NumQueues;\r
+ UINT8 DeviceStatus;\r
+ UINT8 ConfigGeneration;\r
+ UINT16 QueueSelect;\r
+ UINT16 QueueSize;\r
+ UINT16 QueueMsixVector;\r
+ UINT16 QueueEnable;\r
+ UINT16 QueueNotifyOff;\r
+ UINT64 QueueDesc;\r
+ UINT64 QueueAvail;\r
+ UINT64 QueueUsed;\r
} VIRTIO_PCI_COMMON_CFG;\r
#pragma pack ()\r
\r
//\r
// VirtIo 1.0 device status bits\r
//\r
-#define VSTAT_FEATURES_OK BIT3\r
+#define VSTAT_FEATURES_OK BIT3\r
\r
//\r
// VirtIo 1.0 reserved (device-independent) feature bits\r
//\r
-#define VIRTIO_F_VERSION_1 BIT32\r
-#define VIRTIO_F_IOMMU_PLATFORM BIT33\r
+#define VIRTIO_F_VERSION_1 BIT32\r
+#define VIRTIO_F_IOMMU_PLATFORM BIT33\r
\r
//\r
// MMIO VirtIo Header Offsets\r
//\r
-#define VIRTIO_MMIO_OFFSET_QUEUE_READY 0x44\r
-#define VIRTIO_MMIO_OFFSET_QUEUE_DESC_LO 0x80\r
-#define VIRTIO_MMIO_OFFSET_QUEUE_DESC_HI 0x84\r
-#define VIRTIO_MMIO_OFFSET_QUEUE_AVAIL_LO 0x90\r
-#define VIRTIO_MMIO_OFFSET_QUEUE_AVAIL_HI 0x94\r
-#define VIRTIO_MMIO_OFFSET_QUEUE_USED_LO 0xa0\r
-#define VIRTIO_MMIO_OFFSET_QUEUE_USED_HI 0xa4\r
-#define VIRTIO_MMIO_OFFSET_CONFIG_GENERATION 0xfc\r
+#define VIRTIO_MMIO_OFFSET_QUEUE_READY 0x44\r
+#define VIRTIO_MMIO_OFFSET_QUEUE_DESC_LO 0x80\r
+#define VIRTIO_MMIO_OFFSET_QUEUE_DESC_HI 0x84\r
+#define VIRTIO_MMIO_OFFSET_QUEUE_AVAIL_LO 0x90\r
+#define VIRTIO_MMIO_OFFSET_QUEUE_AVAIL_HI 0x94\r
+#define VIRTIO_MMIO_OFFSET_QUEUE_USED_LO 0xa0\r
+#define VIRTIO_MMIO_OFFSET_QUEUE_USED_HI 0xa4\r
+#define VIRTIO_MMIO_OFFSET_CONFIG_GENERATION 0xfc\r
\r
#endif // _VIRTIO_1_0_H_\r