OvmfPkg/MemEncryptSevLib: find pages of initial SMRAM save state map

[mirror_edk2.git] / OvmfPkg / Include / OvmfPlatforms.h

diff --git a/OvmfPkg/Include/OvmfPlatforms.h b/OvmfPkg/Include/OvmfPlatforms.h
index cf6e62435c5bd7054a8fe72215cc53a095017046..cc67f40a883b4ced71b064dbd6db014c9497a4c5 100644 (file)
--- a/OvmfPkg/Include/OvmfPlatforms.h
+++ b/OvmfPkg/Include/OvmfPlatforms.h
@@ -1,6 +1,7 @@
 /** @file\r
   OVMF Platform definitions\r
 \r
+  Copyright (C) 2015, Red Hat, Inc.\r
   Copyright (c) 2014, Gabriel L. Somlo <somlo@cmu.edu>\r
 \r
   This program and the accompanying materials are licensed and made\r
@@ -17,12 +18,8 @@
 \r
 #include <Library/PciLib.h>\r
 #include <IndustryStandard/Pci22.h>\r
-\r
-//\r
-// Host Bridge Device ID (DID) values for PIIX4 and Q35/MCH\r
-//\r
-#define INTEL_82441_DEVICE_ID     0x1237  // PIIX4\r
-#define INTEL_Q35_MCH_DEVICE_ID   0x29C0  // Q35\r
+#include <IndustryStandard/Q35MchIch9.h>\r
+#include <IndustryStandard/I440FxPiix4.h>\r
 \r
 //\r
 // OVMF Host Bridge DID Address\r
@@ -31,19 +28,19 @@
   PCI_LIB_ADDRESS (0, 0, 0, PCI_DEVICE_ID_OFFSET)\r
 \r
 //\r
-// Power Management Device and Function numbers for PIIX4 and Q35/MCH\r
+// Values we program into the PM base address registers\r
+//\r
+#define PIIX4_PMBA_VALUE  0xB000\r
+#define ICH9_PMBASE_VALUE 0x0600\r
+\r
+//\r
+// Common bits in same-purpose registers\r
 //\r
-#define OVMF_PM_DEVICE_PIIX4  0x01\r
-#define OVMF_PM_FUNC_PIIX4    0x03\r
-#define OVMF_PM_DEVICE_Q35    0x1f\r
-#define OVMF_PM_FUNC_Q35      0x00\r
+#define PMBA_RTE BIT0\r
 \r
 //\r
-// Power Management Register access for PIIX4 and Q35/MCH\r
+// Common IO ports relative to the Power Management Base Address\r
 //\r
-#define POWER_MGMT_REGISTER_PIIX4(Offset) \\r
-  PCI_LIB_ADDRESS (0, OVMF_PM_DEVICE_PIIX4, OVMF_PM_FUNC_PIIX4, (Offset))\r
-#define POWER_MGMT_REGISTER_Q35(Offset) \\r
-  PCI_LIB_ADDRESS (0, OVMF_PM_DEVICE_Q35, OVMF_PM_FUNC_Q35, (Offset))\r
+#define ACPI_TIMER_OFFSET 0x8\r
 \r
 #endif\r