OvmfPkg: AcpiTimerLib: Split into multiple phase-specific instances

[mirror_edk2.git] / OvmfPkg / Library / AcpiTimerLib / AcpiTimerLib.c

diff --git a/OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.c b/OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.c
index 7d324cb81589fde540c13ede0b005297ca1bc7e4..938b77cdc66ca26b60ca4c59d699be4eb6b01fca 100644 (file)
--- a/OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.c
+++ b/OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.c
@@ -14,160 +14,17 @@
 \r
 **/\r
 \r
-#include <Base.h>\r
-#include <Library/TimerLib.h>\r
-#include <Library/BaseLib.h>\r
-#include <Library/IoLib.h>\r
-#include <Library/PciLib.h>\r
 #include <Library/DebugLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <IndustryStandard/Pci22.h>\r
+#include <Library/BaseLib.h>\r
 #include <IndustryStandard/Acpi.h>\r
 \r
-//\r
-// PCI Location of PIIX4 Power Management PCI Configuration Registers\r
-//\r
-#define PIIX4_POWER_MANAGEMENT_BUS       0x00\r
-#define PIIX4_POWER_MANAGEMENT_DEVICE    0x01\r
-#define PIIX4_POWER_MANAGEMENT_FUNCTION  0x03\r
-\r
-//\r
-// Macro to access PIIX4 Power Management PCI Configuration Registers\r
-//\r
-#define PIIX4_PCI_POWER_MANAGEMENT_REGISTER(Register) \\r
-  PCI_LIB_ADDRESS (                                   \\r
-    PIIX4_POWER_MANAGEMENT_BUS,                       \\r
-    PIIX4_POWER_MANAGEMENT_DEVICE,                    \\r
-    PIIX4_POWER_MANAGEMENT_FUNCTION,                  \\r
-    Register                                          \\r
-    )\r
-\r
-//\r
-// PCI Location of Q35 Power Management PCI Configuration Registers\r
-//\r
-#define Q35_POWER_MANAGEMENT_BUS       0x00\r
-#define Q35_POWER_MANAGEMENT_DEVICE    0x1f\r
-#define Q35_POWER_MANAGEMENT_FUNCTION  0x00\r
-\r
-//\r
-// Macro to access Q35 Power Management PCI Configuration Registers\r
-//\r
-#define Q35_PCI_POWER_MANAGEMENT_REGISTER(Register) \\r
-  PCI_LIB_ADDRESS (                                 \\r
-    Q35_POWER_MANAGEMENT_BUS,                       \\r
-    Q35_POWER_MANAGEMENT_DEVICE,                    \\r
-    Q35_POWER_MANAGEMENT_FUNCTION,                  \\r
-    Register                                        \\r
-    )\r
-\r
-//\r
-// PCI Location of Host Bridge PCI Configuration Registers\r
-//\r
-#define HOST_BRIDGE_BUS       0x00\r
-#define HOST_BRIDGE_DEVICE    0x00\r
-#define HOST_BRIDGE_FUNCTION  0x00\r
-\r
-//\r
-// Macro to access Host Bridge Configuration Registers\r
-//\r
-#define HOST_BRIDGE_REGISTER(Register) \\r
-  PCI_LIB_ADDRESS (                    \\r
-    HOST_BRIDGE_BUS,                   \\r
-    HOST_BRIDGE_DEVICE,                \\r
-    HOST_BRIDGE_FUNCTION,              \\r
-    Register                           \\r
-    )\r
-\r
-//\r
-// Host Bridge Device ID (DID) Register\r
-//\r
-#define HOST_BRIDGE_DID  HOST_BRIDGE_REGISTER (0x02)\r
-\r
-//\r
-// Host Bridge DID Register values\r
-//\r
-#define PCI_DEVICE_ID_INTEL_82441    0x1237  // DID value for PIIX4\r
-#define PCI_DEVICE_ID_INTEL_Q35_MCH  0x29C0  // DID value for Q35\r
-\r
-//\r
-// Access Power Management PCI Config Regs based on Host Bridge type\r
-//\r
-#define PCI_POWER_MANAGEMENT_REGISTER(Register)                   \\r
-  ((PciRead16 (HOST_BRIDGE_DID) == PCI_DEVICE_ID_INTEL_Q35_MCH) ? \\r
-    Q35_PCI_POWER_MANAGEMENT_REGISTER (Register) :                \\r
-    PIIX4_PCI_POWER_MANAGEMENT_REGISTER (Register))\r
-\r
-//\r
-// Power Management PCI Configuration Registers\r
-//\r
-#define PMBA                PCI_POWER_MANAGEMENT_REGISTER (0x40)\r
-#define   PMBA_RTE          BIT0\r
-#define PMREGMISC           PCI_POWER_MANAGEMENT_REGISTER (0x80)\r
-#define   PMIOSE            BIT0\r
+#include "AcpiTimerLib.h"\r
 \r
 //\r
 // The ACPI Time is a 24-bit counter\r
 //\r
 #define ACPI_TIMER_COUNT_SIZE  BIT24\r
 \r
-//\r
-// Offset in the Power Management Base Address to the ACPI Timer\r
-//\r
-#define ACPI_TIMER_OFFSET      0x8\r
-\r
-/**\r
-  The constructor function enables ACPI IO space.\r
-\r
-  If ACPI I/O space not enabled, this function will enable it.\r
-  It will always return RETURN_SUCCESS.\r
-\r
-  @retval EFI_SUCCESS   The constructor always returns RETURN_SUCCESS.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-AcpiTimerLibConstructor (\r
-  VOID\r
-  )\r
-{\r
-  //\r
-  // Check to see if the Power Management Base Address is already enabled\r
-  //\r
-  if ((PciRead8 (PMREGMISC) & PMIOSE) == 0) {\r
-    //\r
-    // If the Power Management Base Address is not programmed,\r
-    // then program the Power Management Base Address from a PCD.\r
-    //\r
-    PciAndThenOr32 (PMBA, (UINT32)(~0x0000FFC0), PcdGet16 (PcdAcpiPmBaseAddress));\r
-\r
-    //\r
-    // Enable PMBA I/O port decodes in PMREGMISC\r
-    //\r
-    PciOr8 (PMREGMISC, PMIOSE);\r
-  }\r
-  \r
-  return RETURN_SUCCESS;\r
-}\r
-\r
-/**\r
-  Internal function to read the current tick counter of ACPI.\r
-\r
-  Internal function to read the current tick counter of ACPI.\r
-\r
-  @return The tick counter read.\r
-\r
-**/\r
-UINT32\r
-InternalAcpiGetTimerTick (\r
-  VOID\r
-  )\r
-{\r
-  //\r
-  //   Read PMBA to read and return the current ACPI timer value.\r
-  //\r
-  return IoRead32 ((PciRead32 (PMBA) & ~PMBA_RTE) + ACPI_TIMER_OFFSET);\r
-}\r
-\r
 /**\r
   Stalls the CPU for at least the given number of ticks.\r
 \r