\r
#include "BdsPlatform.h"\r
#include <Guid/RootBridgesConnectedEventGroup.h>\r
+#include <Guid/SerialPortLibVendor.h>\r
#include <Protocol/FirmwareVolume2.h>\r
#include <Library/PlatformBmPrintScLib.h>\r
#include <Library/Tcg2PhysicalPresenceLib.h>\r
// (for configuring PCI Interrupt Line register)\r
//\r
CONST UINT8 PciHostIrqs[] = {\r
- 0x0a, 0x0a, 0x0b, 0x0b\r
+ 0x0a, // LNKA, LNKE\r
+ 0x0a, // LNKB, LNKF\r
+ 0x0b, // LNKC, LNKG\r
+ 0x0b // LNKD, LNKH\r
};\r
\r
//\r
//\r
Status = EfiBootManagerDeleteLoadOptionVariable (\r
BootOptions[Index].OptionNumber, LoadOptionTypeBoot);\r
- DEBUG_CODE (\r
+ DEBUG_CODE_BEGIN ();\r
CHAR16 *DevicePathString;\r
\r
DevicePathString = ConvertDevicePathToText(BootOptions[Index].FilePath,\r
FALSE, FALSE);\r
DEBUG ((\r
- EFI_ERROR (Status) ? EFI_D_WARN : EFI_D_VERBOSE,\r
+ EFI_ERROR (Status) ? DEBUG_WARN : DEBUG_VERBOSE,\r
"%a: removing stale Boot#%04x %s: %r\n",\r
__FUNCTION__,\r
(UINT32)BootOptions[Index].OptionNumber,\r
if (DevicePathString != NULL) {\r
FreePool (DevicePathString);\r
}\r
- );\r
+ DEBUG_CODE_END ();\r
}\r
\r
EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);\r
{\r
EFI_HANDLE Handle;\r
EFI_STATUS Status;\r
+ UINT16 FrontPageTimeout;\r
RETURN_STATUS PcdStatus;\r
\r
- DEBUG ((EFI_D_INFO, "PlatformBootManagerBeforeConsole\n"));\r
+ DEBUG ((DEBUG_INFO, "PlatformBootManagerBeforeConsole\n"));\r
InstallDevicePathCallback ();\r
\r
VisitAllInstancesOfProtocol (&gEfiPciRootBridgeIoProtocolGuid,\r
//\r
EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid);\r
\r
- if (QemuFwCfgS3Enabled ()) {\r
+ if (PcdGetBool (PcdAcpiS3Enable)) {\r
//\r
// Save the boot script too. Note that this will require us to emit the\r
// DxeSmmReadyToLock event just below, which in turn locks down SMM.\r
SaveS3BootScript ();\r
}\r
\r
+ // We need to connect all trusted consoles for TCG PP. Here we treat all\r
+ // consoles in OVMF to be trusted consoles.\r
+ PlatformInitializeConsole (\r
+ XenDetected() ? gXenPlatformConsole : gPlatformConsole);\r
+\r
+ //\r
+ // Process TPM PPI request; this may require keyboard input\r
+ //\r
+ Tcg2PhysicalPresenceLibProcessRequest (NULL);\r
+\r
//\r
// Prevent further changes to LockBoxes or SMRAM.\r
+ // Any TPM 2 Physical Presence Interface opcode must be handled before.\r
//\r
Handle = NULL;\r
Status = gBS->InstallProtocolInterface (&Handle,\r
//\r
EfiBootManagerDispatchDeferredImages ();\r
\r
- PlatformInitializeConsole (gPlatformConsole);\r
- PcdStatus = PcdSet16S (PcdPlatformBootTimeOut,\r
- GetFrontPageTimeoutFromQemu ());\r
+ FrontPageTimeout = GetFrontPageTimeoutFromQemu ();\r
+ PcdStatus = PcdSet16S (PcdPlatformBootTimeOut, FrontPageTimeout);\r
ASSERT_RETURN_ERROR (PcdStatus);\r
+ //\r
+ // Reflect the PCD in the standard Timeout variable.\r
+ //\r
+ Status = gRT->SetVariable (\r
+ EFI_TIME_OUT_VARIABLE_NAME,\r
+ &gEfiGlobalVariableGuid,\r
+ (EFI_VARIABLE_NON_VOLATILE |\r
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |\r
+ EFI_VARIABLE_RUNTIME_ACCESS),\r
+ sizeof FrontPageTimeout,\r
+ &FrontPageTimeout\r
+ );\r
+ DEBUG ((\r
+ EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE,\r
+ "%a: SetVariable(%s, %u): %r\n",\r
+ __FUNCTION__,\r
+ EFI_TIME_OUT_VARIABLE_NAME,\r
+ FrontPageTimeout,\r
+ Status\r
+ ));\r
\r
PlatformRegisterOptionsAndKeys ();\r
\r
DevPathStr = ConvertDevicePathToText (DevicePath, FALSE, FALSE);\r
if (DevPathStr != NULL) {\r
DEBUG((\r
- EFI_D_INFO,\r
+ DEBUG_INFO,\r
"BdsPlatform.c+%d: COM%d DevPath: %s\n",\r
- __LINE__,\r
+ DEBUG_LINE_NUMBER,\r
gPnp16550ComPortDeviceNode.UID + 1,\r
DevPathStr\r
));\r
DevPathStr = ConvertDevicePathToText (DevicePath, FALSE, FALSE);\r
if (DevPathStr != NULL) {\r
DEBUG((\r
- EFI_D_INFO,\r
+ DEBUG_INFO,\r
"BdsPlatform.c+%d: COM%d DevPath: %s\n",\r
- __LINE__,\r
+ DEBUG_LINE_NUMBER,\r
gPnp16550ComPortDeviceNode.UID + 1,\r
DevPathStr\r
));\r
return EFI_SUCCESS;\r
}\r
\r
+typedef struct {\r
+ VENDOR_DEVICE_PATH Guid;\r
+ EFI_DEVICE_PATH_PROTOCOL End;\r
+} SERIAL_DEVICE_PATH;\r
+\r
+SERIAL_DEVICE_PATH serialDevicePath = {\r
+ {\r
+ { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, { sizeof (VENDOR_DEVICE_PATH), 0} },\r
+ EDKII_SERIAL_PORT_LIB_VENDOR_GUID\r
+ },\r
+ { END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 } }\r
+};\r
+\r
+VOID\r
+PrepareMicrovmDevicePath (\r
+ VOID\r
+ )\r
+{\r
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
+ UINT16 HostBridgeDevId;\r
+\r
+ HostBridgeDevId = PcdGet16 (PcdOvmfHostBridgePciDevId);\r
+ if (HostBridgeDevId != MICROVM_PSEUDO_DEVICE_ID) {\r
+ return;\r
+ }\r
+\r
+ DevicePath = (EFI_DEVICE_PATH_PROTOCOL*)&serialDevicePath;\r
+ DevicePath = AppendDevicePathNode (DevicePath,\r
+ (EFI_DEVICE_PATH_PROTOCOL *)&gUartDeviceNode);\r
+ DevicePath = AppendDevicePathNode (DevicePath,\r
+ (EFI_DEVICE_PATH_PROTOCOL *)&gTerminalTypeDeviceNode);\r
+\r
+ EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL);\r
+ EfiBootManagerUpdateConsoleVariable (ConIn, DevicePath, NULL);\r
+ EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL);\r
+}\r
+\r
EFI_STATUS\r
GetGopDevicePath (\r
IN EFI_DEVICE_PATH_PROTOCOL *PciDevicePath,\r
// Add IsaKeyboard to ConIn,\r
// add IsaSerial to ConOut, ConIn, ErrOut\r
//\r
- DEBUG ((EFI_D_INFO, "Found LPC Bridge device\n"));\r
+ DEBUG ((DEBUG_INFO, "Found LPC Bridge device\n"));\r
PrepareLpcBridgeDevicePath (Handle);\r
return EFI_SUCCESS;\r
}\r
//\r
// Add them to ConOut, ConIn, ErrOut.\r
//\r
- DEBUG ((EFI_D_INFO, "Found PCI 16550 SERIAL device\n"));\r
+ DEBUG ((DEBUG_INFO, "Found PCI 16550 SERIAL device\n"));\r
PreparePciSerialDevicePath (Handle);\r
return EFI_SUCCESS;\r
}\r
//\r
// Add them to ConOut.\r
//\r
- DEBUG ((EFI_D_INFO, "Found PCI display device\n"));\r
+ DEBUG ((DEBUG_INFO, "Found PCI display device\n"));\r
PreparePciDisplayDevicePath (Handle);\r
return EFI_SUCCESS;\r
}\r
//\r
VisitAllPciInstances (DetectAndPreparePlatformPciDevicePath);\r
\r
+ PrepareMicrovmDevicePath ();\r
+\r
//\r
// Have chance to connect the platform default console,\r
// the platform default console is the minimum device group\r
}\r
if (RootBusNumber == 0 && RootSlot == 0) {\r
DEBUG((\r
- EFI_D_ERROR,\r
+ DEBUG_ERROR,\r
"%a: PCI host bridge (00:00.0) should have no interrupts!\n",\r
__FUNCTION__\r
));\r
Status = PciIo->GetLocation (PciIo, &Segment, &Bus, &Device, &Function);\r
ASSERT_EFI_ERROR (Status);\r
\r
- DEBUG ((EFI_D_VERBOSE, "%a: [%02x:%02x.%x] %s -> 0x%02x\n", __FUNCTION__,\r
+ DEBUG ((DEBUG_VERBOSE, "%a: [%02x:%02x.%x] %s -> 0x%02x\n", __FUNCTION__,\r
(UINT32)Bus, (UINT32)Device, (UINT32)Function, DevPathString,\r
IrqLine));\r
\r
//\r
// 00:01.0 ISA Bridge (PIIX4) LNK routing targets\r
//\r
- PciWrite8 (PCI_LIB_ADDRESS (0, 1, 0, 0x60), 0x0b); // A\r
- PciWrite8 (PCI_LIB_ADDRESS (0, 1, 0, 0x61), 0x0b); // B\r
- PciWrite8 (PCI_LIB_ADDRESS (0, 1, 0, 0x62), 0x0a); // C\r
- PciWrite8 (PCI_LIB_ADDRESS (0, 1, 0, 0x63), 0x0a); // D\r
+ PciWrite8 (PCI_LIB_ADDRESS (0, 1, 0, 0x60), PciHostIrqs[0]); // A\r
+ PciWrite8 (PCI_LIB_ADDRESS (0, 1, 0, 0x61), PciHostIrqs[1]); // B\r
+ PciWrite8 (PCI_LIB_ADDRESS (0, 1, 0, 0x62), PciHostIrqs[2]); // C\r
+ PciWrite8 (PCI_LIB_ADDRESS (0, 1, 0, 0x63), PciHostIrqs[3]); // D\r
break;\r
case INTEL_Q35_MCH_DEVICE_ID:\r
Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);\r
//\r
// 00:1f.0 LPC Bridge (Q35) LNK routing targets\r
//\r
- PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x60), 0x0a); // A\r
- PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x61), 0x0a); // B\r
- PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x62), 0x0b); // C\r
- PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x63), 0x0b); // D\r
- PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x68), 0x0a); // E\r
- PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x69), 0x0a); // F\r
- PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x6a), 0x0b); // G\r
- PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x6b), 0x0b); // H\r
+ PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x60), PciHostIrqs[0]); // A\r
+ PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x61), PciHostIrqs[1]); // B\r
+ PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x62), PciHostIrqs[2]); // C\r
+ PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x63), PciHostIrqs[3]); // D\r
+ PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x68), PciHostIrqs[0]); // E\r
+ PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x69), PciHostIrqs[1]); // F\r
+ PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x6a), PciHostIrqs[2]); // G\r
+ PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x6b), PciHostIrqs[3]); // H\r
break;\r
+ case MICROVM_PSEUDO_DEVICE_ID:\r
+ return;\r
default:\r
- DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",\r
+ if (XenDetected ()) {\r
+ //\r
+ // There is no PCI bus in this case.\r
+ //\r
+ return;\r
+ }\r
+ DEBUG ((DEBUG_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",\r
__FUNCTION__, mHostBridgeDevId));\r
ASSERT (FALSE);\r
return;\r
DevPathStr = ConvertDevicePathToText (DevicePath, FALSE, FALSE);\r
if (DevPathStr != NULL) {\r
DEBUG((\r
- EFI_D_INFO,\r
+ DEBUG_INFO,\r
"Found %s device: %s\n",\r
(IS_CLASS1 (PciHeader, PCI_CLASS_MASS_STORAGE) ?\r
L"Mass Storage" :\r
IN VOID *Context\r
)\r
{\r
- DEBUG ((EFI_D_INFO, "EmuVariablesUpdatedCallback\n"));\r
+ DEBUG ((DEBUG_INFO, "EmuVariablesUpdatedCallback\n"));\r
UpdateNvVarsOnFileSystem ();\r
}\r
\r
UINTN Index;\r
RETURN_STATUS Status;\r
\r
- DEBUG ((EFI_D_INFO, "PlatformBdsConnectSequence\n"));\r
+ DEBUG ((DEBUG_INFO, "PlatformBdsConnectSequence\n"));\r
\r
Index = 0;\r
\r
{\r
EFI_BOOT_MODE BootMode;\r
\r
- DEBUG ((EFI_D_INFO, "PlatformBootManagerAfterConsole\n"));\r
+ DEBUG ((DEBUG_INFO, "PlatformBootManagerAfterConsole\n"));\r
\r
if (PcdGetBool (PcdOvmfFlashVariablesEnable)) {\r
- DEBUG ((EFI_D_INFO, "PlatformBdsPolicyBehavior: not restoring NvVars "\r
+ DEBUG ((DEBUG_INFO, "PlatformBdsPolicyBehavior: not restoring NvVars "\r
"from disk since flash variables appear to be supported.\n"));\r
} else {\r
//\r
//\r
PciAcpiInitialization ();\r
\r
- //\r
- // Process TPM PPI request\r
- //\r
- Tcg2PhysicalPresenceLibProcessRequest (NULL);\r
-\r
//\r
// Process QEMU's -kernel command line option\r
//\r
VOID\r
)\r
{\r
- DEBUG ((EFI_D_INFO, "Registered NotifyDevPath Event\n"));\r
+ DEBUG ((DEBUG_INFO, "Registered NotifyDevPath Event\n"));\r
mEfiDevPathEvent = EfiCreateProtocolNotifyEvent (\r
&gEfiDevicePathProtocolGuid,\r
TPL_CALLBACK,\r
{\r
EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION Black;\r
EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION White;\r
- UINT16 Timeout;\r
+ UINT16 TimeoutInitial;\r
\r
- Timeout = PcdGet16 (PcdPlatformBootTimeOut);\r
+ TimeoutInitial = PcdGet16 (PcdPlatformBootTimeOut);\r
+\r
+ //\r
+ // If PcdPlatformBootTimeOut is set to zero, then we consider\r
+ // that no progress update should be enacted (since we'd only\r
+ // ever display a one-shot progress of either 0% or 100%).\r
+ //\r
+ if (TimeoutInitial == 0) {\r
+ return;\r
+ }\r
\r
Black.Raw = 0x00000000;\r
White.Raw = 0x00FFFFFF;\r
Black.Pixel,\r
L"Start boot option",\r
White.Pixel,\r
- (Timeout - TimeoutRemain) * 100 / Timeout,\r
+ (TimeoutInitial - TimeoutRemain) * 100 / TimeoutInitial,\r
0\r
);\r
}\r
projects / mirror_edk2.git / blobdiff