IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
)\r
{\r
- UINT32 LowerMemorySize;\r
-\r
if (PlatformInfoHob->HostBridgeDevId == 0xffff /* microvm */) {\r
return;\r
}\r
\r
+ if (PlatformInfoHob->HostBridgeDevId == CLOUDHV_DEVICE_ID) {\r
+ PlatformInfoHob->Uc32Size = CLOUDHV_MMIO_HOLE_SIZE;\r
+ PlatformInfoHob->Uc32Base = CLOUDHV_MMIO_HOLE_ADDRESS;\r
+ return;\r
+ }\r
+\r
+ PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
+\r
if (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {\r
- LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
ASSERT (PcdGet64 (PcdPciExpressBaseAddress) <= MAX_UINT32);\r
- ASSERT (PcdGet64 (PcdPciExpressBaseAddress) >= LowerMemorySize);\r
+ ASSERT (PcdGet64 (PcdPciExpressBaseAddress) >= PlatformInfoHob->LowMemory);\r
\r
- if (LowerMemorySize <= BASE_2GB) {\r
+ if (PlatformInfoHob->LowMemory <= BASE_2GB) {\r
// Newer qemu with gigabyte aligned memory,\r
// 32-bit pci mmio window is 2G -> 4G then.\r
PlatformInfoHob->Uc32Base = BASE_2GB;\r
return;\r
}\r
\r
- if (PlatformInfoHob->HostBridgeDevId == CLOUDHV_DEVICE_ID) {\r
- PlatformInfoHob->Uc32Size = CLOUDHV_MMIO_HOLE_SIZE;\r
- PlatformInfoHob->Uc32Base = CLOUDHV_MMIO_HOLE_ADDRESS;\r
- return;\r
- }\r
-\r
ASSERT (PlatformInfoHob->HostBridgeDevId == INTEL_82441_DEVICE_ID);\r
//\r
// On i440fx, start with the [LowerMemorySize, 4GB) range. Make sure one\r
// variable MTRR suffices by truncating the size to a whole power of two,\r
// while keeping the end affixed to 4GB. This will round the base up.\r
//\r
- LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
- PlatformInfoHob->Uc32Size = GetPowerOfTwo32 ((UINT32)(SIZE_4GB - LowerMemorySize));\r
+ PlatformInfoHob->Uc32Size = GetPowerOfTwo32 ((UINT32)(SIZE_4GB - PlatformInfoHob->LowMemory));\r
PlatformInfoHob->Uc32Base = (UINT32)(SIZE_4GB - PlatformInfoHob->Uc32Size);\r
//\r
// Assuming that LowerMemorySize is at least 1 byte, Uc32Size is at most 2GB.\r
//\r
ASSERT (PlatformInfoHob->Uc32Base >= BASE_2GB);\r
\r
- if (PlatformInfoHob->Uc32Base != LowerMemorySize) {\r
+ if (PlatformInfoHob->Uc32Base != PlatformInfoHob->LowMemory) {\r
DEBUG ((\r
DEBUG_VERBOSE,\r
"%a: rounded UC32 base from 0x%x up to 0x%x, for "\r
"an UC32 size of 0x%x\n",\r
__FUNCTION__,\r
- LowerMemorySize,\r
+ PlatformInfoHob->LowMemory,\r
PlatformInfoHob->Uc32Base,\r
PlatformInfoHob->Uc32Size\r
));\r
}\r
}\r
\r
-/**\r
- Iterate over the RAM entries in QEMU's fw_cfg E820 RAM map that start outside\r
- of the 32-bit address range.\r
-\r
- Find the highest exclusive >=4GB RAM address, or produce memory resource\r
- descriptor HOBs for RAM entries that start at or above 4GB.\r
-\r
- @param[out] MaxAddress If MaxAddress is NULL, then PlatformScanOrAdd64BitE820Ram()\r
- produces memory resource descriptor HOBs for RAM\r
- entries that start at or above 4GB.\r
+typedef VOID (*E820_SCAN_CALLBACK) (\r
+ EFI_E820_ENTRY64 *E820Entry,\r
+ EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
+ );\r
\r
- Otherwise, MaxAddress holds the highest exclusive\r
- >=4GB RAM address on output. If QEMU's fw_cfg E820\r
- RAM map contains no RAM entry that starts outside of\r
- the 32-bit address range, then MaxAddress is exactly\r
- 4GB on output.\r
+/**\r
+ Store first address not used by e820 RAM entries in\r
+ PlatformInfoHob->FirstNonAddress\r
+**/\r
+STATIC\r
+VOID\r
+PlatformGetFirstNonAddressCB (\r
+ IN EFI_E820_ENTRY64 *E820Entry,\r
+ IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
+ )\r
+{\r
+ UINT64 Candidate;\r
\r
- @retval EFI_SUCCESS The fw_cfg E820 RAM map was found and processed.\r
+ if (E820Entry->Type != EfiAcpiAddressRangeMemory) {\r
+ return;\r
+ }\r
\r
- @retval EFI_PROTOCOL_ERROR The RAM map was found, but its size wasn't a\r
- whole multiple of sizeof(EFI_E820_ENTRY64). No\r
- RAM entry was processed.\r
+ Candidate = E820Entry->BaseAddr + E820Entry->Length;\r
+ if (PlatformInfoHob->FirstNonAddress < Candidate) {\r
+ DEBUG ((DEBUG_INFO, "%a: FirstNonAddress=0x%Lx\n", __FUNCTION__, Candidate));\r
+ PlatformInfoHob->FirstNonAddress = Candidate;\r
+ }\r
+}\r
\r
- @return Error codes from QemuFwCfgFindFile(). No RAM\r
- entry was processed.\r
+/**\r
+ Store the low (below 4G) memory size in\r
+ PlatformInfoHob->LowMemory\r
**/\r
STATIC\r
-EFI_STATUS\r
-PlatformScanOrAdd64BitE820Ram (\r
- IN BOOLEAN AddHighHob,\r
- OUT UINT64 *LowMemory OPTIONAL,\r
- OUT UINT64 *MaxAddress OPTIONAL\r
+VOID\r
+PlatformGetLowMemoryCB (\r
+ IN EFI_E820_ENTRY64 *E820Entry,\r
+ IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
)\r
{\r
- EFI_STATUS Status;\r
- FIRMWARE_CONFIG_ITEM FwCfgItem;\r
- UINTN FwCfgSize;\r
- EFI_E820_ENTRY64 E820Entry;\r
- UINTN Processed;\r
+ UINT64 Candidate;\r
\r
- Status = QemuFwCfgFindFile ("etc/e820", &FwCfgItem, &FwCfgSize);\r
- if (EFI_ERROR (Status)) {\r
- return Status;\r
+ if (E820Entry->Type != EfiAcpiAddressRangeMemory) {\r
+ return;\r
}\r
\r
- if (FwCfgSize % sizeof E820Entry != 0) {\r
- return EFI_PROTOCOL_ERROR;\r
+ Candidate = E820Entry->BaseAddr + E820Entry->Length;\r
+ if (Candidate >= BASE_4GB) {\r
+ return;\r
}\r
\r
- if (LowMemory != NULL) {\r
- *LowMemory = 0;\r
+ if (PlatformInfoHob->LowMemory < Candidate) {\r
+ DEBUG ((DEBUG_INFO, "%a: LowMemory=0x%Lx\n", __FUNCTION__, Candidate));\r
+ PlatformInfoHob->LowMemory = (UINT32)Candidate;\r
}\r
+}\r
\r
- if (MaxAddress != NULL) {\r
- *MaxAddress = BASE_4GB;\r
- }\r
+/**\r
+ Create HOBs for reservations and RAM (except low memory).\r
+**/\r
+STATIC\r
+VOID\r
+PlatformAddHobCB (\r
+ IN EFI_E820_ENTRY64 *E820Entry,\r
+ IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
+ )\r
+{\r
+ UINT64 Base, End;\r
\r
- QemuFwCfgSelectItem (FwCfgItem);\r
- for (Processed = 0; Processed < FwCfgSize; Processed += sizeof E820Entry) {\r
- QemuFwCfgReadBytes (sizeof E820Entry, &E820Entry);\r
- DEBUG ((\r
- DEBUG_VERBOSE,\r
- "%a: Base=0x%Lx Length=0x%Lx Type=%u\n",\r
- __FUNCTION__,\r
- E820Entry.BaseAddr,\r
- E820Entry.Length,\r
- E820Entry.Type\r
- ));\r
- if (E820Entry.Type == EfiAcpiAddressRangeMemory) {\r
- if (AddHighHob && (E820Entry.BaseAddr >= BASE_4GB)) {\r
- UINT64 Base;\r
- UINT64 End;\r
+ Base = E820Entry->BaseAddr;\r
+ End = E820Entry->BaseAddr + E820Entry->Length;\r
\r
+ switch (E820Entry->Type) {\r
+ case EfiAcpiAddressRangeMemory:\r
+ if (Base >= BASE_4GB) {\r
//\r
// Round up the start address, and round down the end address.\r
//\r
- Base = ALIGN_VALUE (E820Entry.BaseAddr, (UINT64)EFI_PAGE_SIZE);\r
- End = (E820Entry.BaseAddr + E820Entry.Length) &\r
- ~(UINT64)EFI_PAGE_MASK;\r
+ Base = ALIGN_VALUE (Base, (UINT64)EFI_PAGE_SIZE);\r
+ End = End & ~(UINT64)EFI_PAGE_MASK;\r
if (Base < End) {\r
+ DEBUG ((DEBUG_INFO, "%a: HighMemory [0x%Lx, 0x%Lx)\n", __FUNCTION__, Base, End));\r
PlatformAddMemoryRangeHob (Base, End);\r
- DEBUG ((\r
- DEBUG_VERBOSE,\r
- "%a: PlatformAddMemoryRangeHob [0x%Lx, 0x%Lx)\n",\r
- __FUNCTION__,\r
- Base,\r
- End\r
- ));\r
}\r
}\r
\r
- if (MaxAddress || LowMemory) {\r
- UINT64 Candidate;\r
-\r
- Candidate = E820Entry.BaseAddr + E820Entry.Length;\r
- if (MaxAddress && (Candidate > *MaxAddress)) {\r
- *MaxAddress = Candidate;\r
- DEBUG ((\r
- DEBUG_VERBOSE,\r
- "%a: MaxAddress=0x%Lx\n",\r
- __FUNCTION__,\r
- *MaxAddress\r
- ));\r
- }\r
-\r
- if (LowMemory && (Candidate > *LowMemory) && (Candidate < BASE_4GB)) {\r
- *LowMemory = Candidate;\r
- DEBUG ((\r
- DEBUG_VERBOSE,\r
- "%a: LowMemory=0x%Lx\n",\r
- __FUNCTION__,\r
- *LowMemory\r
- ));\r
- }\r
- }\r
- } else if (E820Entry.Type == EfiAcpiAddressRangeReserved) {\r
- if (AddHighHob) {\r
- DEBUG ((\r
- DEBUG_INFO,\r
- "%a: Reserved: Base=0x%Lx Length=0x%Lx\n",\r
- __FUNCTION__,\r
- E820Entry.BaseAddr,\r
- E820Entry.Length\r
- ));\r
- BuildResourceDescriptorHob (\r
- EFI_RESOURCE_MEMORY_RESERVED,\r
- 0,\r
- E820Entry.BaseAddr,\r
- E820Entry.Length\r
- );\r
- }\r
- }\r
+ break;\r
+ case EfiAcpiAddressRangeReserved:\r
+ BuildResourceDescriptorHob (EFI_RESOURCE_MEMORY_RESERVED, 0, Base, End - Base);\r
+ DEBUG ((DEBUG_INFO, "%a: Reserved [0x%Lx, 0x%Lx)\n", __FUNCTION__, Base, End));\r
+ break;\r
+ default:\r
+ DEBUG ((\r
+ DEBUG_WARN,\r
+ "%a: Type %u [0x%Lx, 0x%Lx) (NOT HANDLED)\n",\r
+ __FUNCTION__,\r
+ E820Entry->Type,\r
+ Base,\r
+ End\r
+ ));\r
+ break;\r
}\r
-\r
- return EFI_SUCCESS;\r
}\r
\r
-typedef VOID (*E820_SCAN_CALLBACK) (\r
- EFI_E820_ENTRY64 *E820Entry,\r
- EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
- );\r
-\r
/**\r
- Store first address not used by e820 RAM entries in\r
- PlatformInfoHob->FirstNonAddress\r
+ Check whenever the 64bit PCI MMIO window overlaps with a reservation\r
+ from qemu. If so move down the MMIO window to resolve the conflict.\r
+\r
+ This happens on (virtual) AMD machines with 1TB address space,\r
+ because the AMD IOMMU uses an address window just below 1TB.\r
**/\r
STATIC\r
VOID\r
-PlatformGetFirstNonAddressCB (\r
+PlatformReservationConflictCB (\r
IN EFI_E820_ENTRY64 *E820Entry,\r
IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
)\r
{\r
- UINT64 Candidate;\r
-\r
- if (E820Entry->Type != EfiAcpiAddressRangeMemory) {\r
- return;\r
+ UINT64 IntersectionBase;\r
+ UINT64 IntersectionEnd;\r
+ UINT64 NewBase;\r
+\r
+ IntersectionBase = MAX (\r
+ E820Entry->BaseAddr,\r
+ PlatformInfoHob->PcdPciMmio64Base\r
+ );\r
+ IntersectionEnd = MIN (\r
+ E820Entry->BaseAddr + E820Entry->Length,\r
+ PlatformInfoHob->PcdPciMmio64Base +\r
+ PlatformInfoHob->PcdPciMmio64Size\r
+ );\r
+\r
+ if (IntersectionBase >= IntersectionEnd) {\r
+ return; // no overlap\r
}\r
\r
- Candidate = E820Entry->BaseAddr + E820Entry->Length;\r
- if (PlatformInfoHob->FirstNonAddress < Candidate) {\r
- DEBUG ((DEBUG_INFO, "%a: FirstNonAddress=0x%Lx\n", __FUNCTION__, Candidate));\r
- PlatformInfoHob->FirstNonAddress = Candidate;\r
- }\r
+ NewBase = E820Entry->BaseAddr - PlatformInfoHob->PcdPciMmio64Size;\r
+ NewBase = NewBase & ~(PlatformInfoHob->PcdPciMmio64Size - 1);\r
+\r
+ DEBUG ((\r
+ DEBUG_INFO,\r
+ "%a: move mmio: 0x%Lx => %Lx\n",\r
+ __FUNCTION__,\r
+ PlatformInfoHob->PcdPciMmio64Base,\r
+ NewBase\r
+ ));\r
+ PlatformInfoHob->PcdPciMmio64Base = NewBase;\r
}\r
\r
/**\r
return HighestAddress;\r
}\r
\r
-UINT32\r
+VOID\r
EFIAPI\r
PlatformGetSystemMemorySizeBelow4gb (\r
IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
)\r
{\r
EFI_STATUS Status;\r
- UINT64 LowerMemorySize = 0;\r
UINT8 Cmos0x34;\r
UINT8 Cmos0x35;\r
\r
(CcProbe () != CcGuestTypeIntelTdx))\r
{\r
// Get the information from PVH memmap\r
- return (UINT32)GetHighestSystemMemoryAddressFromPvhMemmap (TRUE);\r
+ PlatformInfoHob->LowMemory = (UINT32)GetHighestSystemMemoryAddressFromPvhMemmap (TRUE);\r
+ return;\r
}\r
\r
- Status = PlatformScanOrAdd64BitE820Ram (FALSE, &LowerMemorySize, NULL);\r
- if ((Status == EFI_SUCCESS) && (LowerMemorySize > 0)) {\r
- return (UINT32)LowerMemorySize;\r
+ Status = PlatformScanE820 (PlatformGetLowMemoryCB, PlatformInfoHob);\r
+ if (!EFI_ERROR (Status) && (PlatformInfoHob->LowMemory > 0)) {\r
+ return;\r
}\r
\r
//\r
Cmos0x34 = (UINT8)PlatformCmosRead8 (0x34);\r
Cmos0x35 = (UINT8)PlatformCmosRead8 (0x35);\r
\r
- return (UINT32)(((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);\r
+ PlatformInfoHob->LowMemory = (UINT32)(((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);\r
}\r
\r
STATIC\r
DEBUG ((DEBUG_INFO, "%a: MMIO Space 0x%Lx (%Ld GB)\n", __func__, MmioSpace, RShiftU64 (MmioSpace, 30)));\r
PlatformInfoHob->PcdPciMmio64Size = MmioSpace;\r
PlatformInfoHob->PcdPciMmio64Base = AddrSpace - MmioSpace;\r
+ PlatformScanE820 (PlatformReservationConflictCB, PlatformInfoHob);\r
} else {\r
DEBUG ((DEBUG_INFO, "%a: using classic mmio window\n", __func__));\r
}\r
IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
)\r
{\r
- UINT64 LowerMemorySize;\r
UINT64 UpperMemorySize;\r
MTRR_SETTINGS MtrrSettings;\r
EFI_STATUS Status;\r
//\r
// Determine total memory size available\r
//\r
- LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
+ PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
\r
if (PlatformInfoHob->BootMode == BOOT_ON_S3_RESUME) {\r
//\r
UINT32 TsegSize;\r
\r
TsegSize = PlatformInfoHob->Q35TsegMbytes * SIZE_1MB;\r
- PlatformAddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize);\r
+ PlatformAddMemoryRangeHob (BASE_1MB, PlatformInfoHob->LowMemory - TsegSize);\r
PlatformAddReservedMemoryBaseSizeHob (\r
- LowerMemorySize - TsegSize,\r
+ PlatformInfoHob->LowMemory - TsegSize,\r
TsegSize,\r
TRUE\r
);\r
} else {\r
- PlatformAddMemoryRangeHob (BASE_1MB, LowerMemorySize);\r
+ PlatformAddMemoryRangeHob (BASE_1MB, PlatformInfoHob->LowMemory);\r
}\r
\r
//\r
// entries. Otherwise, create a single memory HOB with the flat >=4GB\r
// memory size read from the CMOS.\r
//\r
- Status = PlatformScanOrAdd64BitE820Ram (TRUE, NULL, NULL);\r
+ Status = PlatformScanE820 (PlatformAddHobCB, PlatformInfoHob);\r
if (EFI_ERROR (Status)) {\r
UpperMemorySize = PlatformGetSystemMemorySizeAbove4gb ();\r
if (UpperMemorySize != 0) {\r
// Make sure the TSEG area that we reported as a reserved memory resource\r
// cannot be used for reserved memory allocations.\r
//\r
+ PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
TsegSize = PlatformInfoHob->Q35TsegMbytes * SIZE_1MB;\r
BuildMemoryAllocationHob (\r
- PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob) - TsegSize,\r
+ PlatformInfoHob->LowMemory - TsegSize,\r
TsegSize,\r
EfiReservedMemoryType\r
);\r
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