OvmfPkg/QemuFwCfgLibMmio: Add RISC-V arch support

[mirror_edk2.git] / OvmfPkg / Library / QemuFwCfgLib / QemuFwCfgLibMmio.c

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index e2ac4108d116f3ee63fde94a4929bc0a2e656856..b953f2eb6c81c5309e6cfb839d0b86db924f62d2 100644 (file)
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -4,6 +4,7 @@
 \r
   Copyright (C) 2013 - 2014, Red Hat, Inc.\r
   Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>\r
+  (C) Copyright 2021 Hewlett Packard Enterprise Development LP<BR>\r
 \r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 **/\r
@@ -239,7 +240,7 @@ MmioReadBytes (
   UINT8 *Ptr;\r
   UINT8 *End;\r
 \r
-#ifdef MDE_CPU_AARCH64\r
+#if defined(MDE_CPU_AARCH64) || defined(MDE_CPU_RISCV64)\r
   Left = Size & 7;\r
 #else\r
   Left = Size & 3;\r
@@ -249,7 +250,7 @@ MmioReadBytes (
   Ptr = Buffer;\r
   End = Ptr + Size;\r
 \r
-#ifdef MDE_CPU_AARCH64\r
+#if defined(MDE_CPU_AARCH64) || defined(MDE_CPU_RISCV64)\r
   while (Ptr < End) {\r
     *(UINT64 *)Ptr = MmioRead64 (mFwCfgDataAddress);\r
     Ptr += 8;\r
@@ -322,7 +323,7 @@ DmaTransferBytes (
   //\r
   // This will fire off the transfer.\r
   //\r
-#ifdef MDE_CPU_AARCH64\r
+#if defined(MDE_CPU_AARCH64) || defined(MDE_CPU_RISCV64)\r
   MmioWrite64 (mFwCfgDmaAddress, SwapBytes64 ((UINT64)&Access));\r
 #else\r
   MmioWrite32 ((UINT32)(mFwCfgDmaAddress + 4), SwapBytes32 ((UINT32)&Access));\r