SPDX-License-Identifier: BSD-2-Clause-Patent\r
**/\r
\r
+#include <IndustryStandard/Q35MchIch9.h>\r
#include <Library/BaseLib.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/MemEncryptSevLib.h>\r
+#include <Library/PcdLib.h>\r
#include <Library/SmmCpuFeaturesLib.h>\r
#include <Library/SmmServicesTableLib.h>\r
#include <Library/UefiBootServicesTableLib.h>\r
#include <PiSmm.h>\r
+#include <Register/Intel/SmramSaveStateMap.h>\r
#include <Register/QemuSmramSaveStateMap.h>\r
\r
//\r
\r
ZeroMem ((VOID *)MapPagesBase, EFI_PAGES_TO_SIZE (MapPagesCount));\r
\r
- Status = gBS->FreePages (MapPagesBase, MapPagesCount);\r
- ASSERT_EFI_ERROR (Status);\r
+ if (PcdGetBool (PcdQ35SmramAtDefaultSmbase)) {\r
+ //\r
+ // The initial SMRAM Save State Map has been covered as part of a larger\r
+ // reserved memory allocation in PlatformPei's InitializeRamRegions(). That\r
+ // allocation is supposed to survive into OS runtime; we must not release\r
+ // any part of it. Only re-assert the containment here.\r
+ //\r
+ ASSERT (SMM_DEFAULT_SMBASE <= MapPagesBase);\r
+ ASSERT (\r
+ (MapPagesBase + EFI_PAGES_TO_SIZE (MapPagesCount) <=\r
+ SMM_DEFAULT_SMBASE + MCH_DEFAULT_SMBASE_SIZE)\r
+ );\r
+ } else {\r
+ Status = gBS->FreePages (MapPagesBase, MapPagesCount);\r
+ ASSERT_EFI_ERROR (Status);\r
+ }\r
}\r
\r
/**\r