\r
#include <IndustryStandard/FusionMptScsi.h>\r
#include <IndustryStandard/Pci.h>\r
+#include <Library/BaseMemoryLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
+#include <Library/PcdLib.h>\r
#include <Library/UefiBootServicesTableLib.h>\r
#include <Library/UefiLib.h>\r
#include <Protocol/PciIo.h>\r
UINT32 Signature;\r
EFI_EXT_SCSI_PASS_THRU_PROTOCOL PassThru;\r
EFI_EXT_SCSI_PASS_THRU_MODE PassThruMode;\r
+ UINT8 MaxTarget;\r
+ EFI_PCI_IO_PROTOCOL *PciIo;\r
+ UINT64 OriginalPciAttributes;\r
} MPT_SCSI_DEV;\r
\r
#define MPT_SCSI_FROM_PASS_THRU(PassThruPtr) \\r
CR (PassThruPtr, MPT_SCSI_DEV, PassThru, MPT_SCSI_DEV_SIGNATURE)\r
\r
+//\r
+// Hardware functions\r
+//\r
+\r
+STATIC\r
+EFI_STATUS\r
+Out32 (\r
+ IN MPT_SCSI_DEV *Dev,\r
+ IN UINT32 Addr,\r
+ IN UINT32 Data\r
+ )\r
+{\r
+ return Dev->PciIo->Io.Write (\r
+ Dev->PciIo,\r
+ EfiPciIoWidthUint32,\r
+ PCI_BAR_IDX0,\r
+ Addr,\r
+ 1,\r
+ &Data\r
+ );\r
+}\r
+\r
+STATIC\r
+EFI_STATUS\r
+In32 (\r
+ IN MPT_SCSI_DEV *Dev,\r
+ IN UINT32 Addr,\r
+ OUT UINT32 *Data\r
+ )\r
+{\r
+ return Dev->PciIo->Io.Read (\r
+ Dev->PciIo,\r
+ EfiPciIoWidthUint32,\r
+ PCI_BAR_IDX0,\r
+ Addr,\r
+ 1,\r
+ Data\r
+ );\r
+}\r
+\r
+STATIC\r
+EFI_STATUS\r
+MptDoorbell (\r
+ IN MPT_SCSI_DEV *Dev,\r
+ IN UINT8 DoorbellFunc,\r
+ IN UINT8 DoorbellArg\r
+ )\r
+{\r
+ return Out32 (\r
+ Dev,\r
+ MPT_REG_DOORBELL,\r
+ (((UINT32)DoorbellFunc) << 24) | (DoorbellArg << 16)\r
+ );\r
+}\r
+\r
+STATIC\r
+EFI_STATUS\r
+MptScsiReset (\r
+ IN MPT_SCSI_DEV *Dev\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+\r
+ //\r
+ // Reset hardware\r
+ //\r
+ Status = MptDoorbell (Dev, MPT_DOORBELL_RESET, 0);\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
+ //\r
+ // Mask interrupts\r
+ //\r
+ Status = Out32 (Dev, MPT_REG_IMASK, MPT_IMASK_DOORBELL | MPT_IMASK_REPLY);\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
+ //\r
+ // Clear interrupt status\r
+ //\r
+ Status = Out32 (Dev, MPT_REG_ISTATUS, 0);\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
+\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+STATIC\r
+EFI_STATUS\r
+MptScsiInit (\r
+ IN MPT_SCSI_DEV *Dev\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ union {\r
+ MPT_IO_CONTROLLER_INIT_REQUEST Data;\r
+ UINT32 Uint32;\r
+ } AlignedReq;\r
+ MPT_IO_CONTROLLER_INIT_REQUEST *Req;\r
+ MPT_IO_CONTROLLER_INIT_REPLY Reply;\r
+ UINT8 *ReplyBytes;\r
+ UINT32 ReplyWord;\r
+\r
+ Req = &AlignedReq.Data;\r
+\r
+ Status = MptScsiReset (Dev);\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
+\r
+ ZeroMem (Req, sizeof (*Req));\r
+ ZeroMem (&Reply, sizeof (Reply));\r
+ Req->WhoInit = MPT_IOC_WHOINIT_ROM_BIOS;\r
+ Req->Function = MPT_MESSAGE_HDR_FUNCTION_IOC_INIT;\r
+ STATIC_ASSERT (\r
+ FixedPcdGet8 (PcdMptScsiMaxTargetLimit) < 255,\r
+ "Req supports 255 targets only (max target is 254)"\r
+ );\r
+ Req->MaxDevices = Dev->MaxTarget + 1;\r
+ Req->MaxBuses = 1;\r
+\r
+ //\r
+ // Send controller init through doorbell\r
+ //\r
+ STATIC_ASSERT (\r
+ sizeof (*Req) % sizeof (UINT32) == 0,\r
+ "Req must be multiple of UINT32"\r
+ );\r
+ STATIC_ASSERT (\r
+ sizeof (*Req) / sizeof (UINT32) <= MAX_UINT8,\r
+ "Req must fit in MAX_UINT8 Dwords"\r
+ );\r
+ Status = MptDoorbell (\r
+ Dev,\r
+ MPT_DOORBELL_HANDSHAKE,\r
+ (UINT8)(sizeof (*Req) / sizeof (UINT32))\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
+ Status = Dev->PciIo->Io.Write (\r
+ Dev->PciIo,\r
+ EfiPciIoWidthFifoUint32,\r
+ PCI_BAR_IDX0,\r
+ MPT_REG_DOORBELL,\r
+ sizeof (*Req) / sizeof (UINT32),\r
+ Req\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
+\r
+ //\r
+ // Read reply through doorbell\r
+ // Each 32bit (Dword) read produces 16bit (Word) of data\r
+ //\r
+ // The reply is read back to complete the doorbell function but it\r
+ // isn't useful because it doesn't contain relevant data or status\r
+ // codes.\r
+ //\r
+ STATIC_ASSERT (\r
+ sizeof (Reply) % sizeof (UINT16) == 0,\r
+ "Reply must be multiple of UINT16"\r
+ );\r
+ ReplyBytes = (UINT8 *)&Reply;\r
+ while (ReplyBytes != (UINT8 *)(&Reply + 1)) {\r
+ Status = In32 (Dev, MPT_REG_DOORBELL, &ReplyWord);\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
+ CopyMem (ReplyBytes, &ReplyWord, sizeof (UINT16));\r
+ ReplyBytes += sizeof (UINT16);\r
+ }\r
+\r
+ //\r
+ // Clear interrupts generated by doorbell reply\r
+ //\r
+ Status = Out32 (Dev, MPT_REG_ISTATUS, 0);\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
+\r
+ return EFI_SUCCESS;\r
+}\r
+\r
//\r
// Ext SCSI Pass Thru\r
//\r
return EFI_UNSUPPORTED;\r
}\r
\r
+STATIC\r
+BOOLEAN\r
+IsTargetInitialized (\r
+ IN UINT8 *Target\r
+ )\r
+{\r
+ UINTN Idx;\r
+\r
+ for (Idx = 0; Idx < TARGET_MAX_BYTES; ++Idx) {\r
+ if (Target[Idx] != 0xFF) {\r
+ return TRUE;\r
+ }\r
+ }\r
+ return FALSE;\r
+}\r
+\r
STATIC\r
EFI_STATUS\r
EFIAPI\r
IN OUT UINT64 *Lun\r
)\r
{\r
- return EFI_UNSUPPORTED;\r
+ MPT_SCSI_DEV *Dev;\r
+\r
+ Dev = MPT_SCSI_FROM_PASS_THRU (This);\r
+ //\r
+ // Currently support only LUN 0, so hardcode it\r
+ //\r
+ if (!IsTargetInitialized (*Target)) {\r
+ ZeroMem (*Target, TARGET_MAX_BYTES);\r
+ *Lun = 0;\r
+ } else if (**Target > Dev->MaxTarget || *Lun > 0) {\r
+ return EFI_INVALID_PARAMETER;\r
+ } else if (**Target < Dev->MaxTarget) {\r
+ //\r
+ // This device interface support 256 targets only, so it's enough to\r
+ // increment the LSB of Target, as it will never overflow.\r
+ //\r
+ **Target += 1;\r
+ } else {\r
+ return EFI_NOT_FOUND;\r
+ }\r
+\r
+ return EFI_SUCCESS;\r
}\r
\r
STATIC\r
IN OUT UINT8 **Target\r
)\r
{\r
- return EFI_UNSUPPORTED;\r
+ MPT_SCSI_DEV *Dev;\r
+\r
+ Dev = MPT_SCSI_FROM_PASS_THRU (This);\r
+ if (!IsTargetInitialized (*Target)) {\r
+ ZeroMem (*Target, TARGET_MAX_BYTES);\r
+ } else if (**Target > Dev->MaxTarget) {\r
+ return EFI_INVALID_PARAMETER;\r
+ } else if (**Target < Dev->MaxTarget) {\r
+ //\r
+ // This device interface support 256 targets only, so it's enough to\r
+ // increment the LSB of Target, as it will never overflow.\r
+ //\r
+ **Target += 1;\r
+ } else {\r
+ return EFI_NOT_FOUND;\r
+ }\r
+\r
+ return EFI_SUCCESS;\r
}\r
\r
STATIC\r
IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath\r
)\r
{\r
- return EFI_UNSUPPORTED;\r
+ MPT_SCSI_DEV *Dev;\r
+ SCSI_DEVICE_PATH *ScsiDevicePath;\r
+\r
+ if (DevicePath == NULL) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ //\r
+ // This device support 256 targets only, so it's enough to dereference\r
+ // the LSB of Target.\r
+ //\r
+ Dev = MPT_SCSI_FROM_PASS_THRU (This);\r
+ if (*Target > Dev->MaxTarget || Lun > 0) {\r
+ return EFI_NOT_FOUND;\r
+ }\r
+\r
+ ScsiDevicePath = AllocateZeroPool (sizeof (*ScsiDevicePath));\r
+ if (ScsiDevicePath == NULL) {\r
+ return EFI_OUT_OF_RESOURCES;\r
+ }\r
+\r
+ ScsiDevicePath->Header.Type = MESSAGING_DEVICE_PATH;\r
+ ScsiDevicePath->Header.SubType = MSG_SCSI_DP;\r
+ ScsiDevicePath->Header.Length[0] = (UINT8)sizeof (*ScsiDevicePath);\r
+ ScsiDevicePath->Header.Length[1] = (UINT8)(sizeof (*ScsiDevicePath) >> 8);\r
+ ScsiDevicePath->Pun = *Target;\r
+ ScsiDevicePath->Lun = (UINT16)Lun;\r
+\r
+ *DevicePath = &ScsiDevicePath->Header;\r
+ return EFI_SUCCESS;\r
}\r
\r
STATIC\r
OUT UINT64 *Lun\r
)\r
{\r
- return EFI_UNSUPPORTED;\r
+ MPT_SCSI_DEV *Dev;\r
+ SCSI_DEVICE_PATH *ScsiDevicePath;\r
+\r
+ if (DevicePath == NULL ||\r
+ Target == NULL || *Target == NULL || Lun == NULL) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ if (DevicePath->Type != MESSAGING_DEVICE_PATH ||\r
+ DevicePath->SubType != MSG_SCSI_DP) {\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+\r
+ Dev = MPT_SCSI_FROM_PASS_THRU (This);\r
+ ScsiDevicePath = (SCSI_DEVICE_PATH *)DevicePath;\r
+ if (ScsiDevicePath->Pun > Dev->MaxTarget ||\r
+ ScsiDevicePath->Lun > 0) {\r
+ return EFI_NOT_FOUND;\r
+ }\r
+\r
+ ZeroMem (*Target, TARGET_MAX_BYTES);\r
+ //\r
+ // This device support 256 targets only, so it's enough to set the LSB\r
+ // of Target.\r
+ //\r
+ **Target = (UINT8)ScsiDevicePath->Pun;\r
+ *Lun = ScsiDevicePath->Lun;\r
+\r
+ return EFI_SUCCESS;\r
}\r
\r
STATIC\r
\r
Dev->Signature = MPT_SCSI_DEV_SIGNATURE;\r
\r
+ Dev->MaxTarget = PcdGet8 (PcdMptScsiMaxTargetLimit);\r
+\r
+ Status = gBS->OpenProtocol (\r
+ ControllerHandle,\r
+ &gEfiPciIoProtocolGuid,\r
+ (VOID **)&Dev->PciIo,\r
+ This->DriverBindingHandle,\r
+ ControllerHandle,\r
+ EFI_OPEN_PROTOCOL_BY_DRIVER\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ goto FreePool;\r
+ }\r
+\r
+ Status = Dev->PciIo->Attributes (\r
+ Dev->PciIo,\r
+ EfiPciIoAttributeOperationGet,\r
+ 0,\r
+ &Dev->OriginalPciAttributes\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ goto CloseProtocol;\r
+ }\r
+\r
+ //\r
+ // Enable I/O Space & Bus-Mastering\r
+ //\r
+ Status = Dev->PciIo->Attributes (\r
+ Dev->PciIo,\r
+ EfiPciIoAttributeOperationEnable,\r
+ (EFI_PCI_IO_ATTRIBUTE_IO |\r
+ EFI_PCI_IO_ATTRIBUTE_BUS_MASTER),\r
+ NULL\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ goto CloseProtocol;\r
+ }\r
+\r
+ //\r
+ // Signal device supports 64-bit DMA addresses\r
+ //\r
+ Status = Dev->PciIo->Attributes (\r
+ Dev->PciIo,\r
+ EfiPciIoAttributeOperationEnable,\r
+ EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE,\r
+ NULL\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ //\r
+ // Warn user that device will only be using 32-bit DMA addresses.\r
+ //\r
+ // Note that this does not prevent the device/driver from working\r
+ // and therefore we only warn and continue as usual.\r
+ //\r
+ DEBUG ((\r
+ DEBUG_WARN,\r
+ "%a: failed to enable 64-bit DMA addresses\n",\r
+ __FUNCTION__\r
+ ));\r
+ }\r
+\r
+ Status = MptScsiInit (Dev);\r
+ if (EFI_ERROR (Status)) {\r
+ goto RestoreAttributes;\r
+ }\r
+\r
//\r
// Host adapter channel, doesn't exist\r
//\r
&Dev->PassThru\r
);\r
if (EFI_ERROR (Status)) {\r
- goto FreePool;\r
+ goto UninitDev;\r
}\r
\r
return EFI_SUCCESS;\r
\r
+UninitDev:\r
+ MptScsiReset (Dev);\r
+\r
+RestoreAttributes:\r
+ Dev->PciIo->Attributes (\r
+ Dev->PciIo,\r
+ EfiPciIoAttributeOperationSet,\r
+ Dev->OriginalPciAttributes,\r
+ NULL\r
+ );\r
+\r
+CloseProtocol:\r
+ gBS->CloseProtocol (\r
+ ControllerHandle,\r
+ &gEfiPciIoProtocolGuid,\r
+ This->DriverBindingHandle,\r
+ ControllerHandle\r
+ );\r
+\r
FreePool:\r
FreePool (Dev);\r
\r
return Status;\r
}\r
\r
+ MptScsiReset (Dev);\r
+\r
+ Dev->PciIo->Attributes (\r
+ Dev->PciIo,\r
+ EfiPciIoAttributeOperationSet,\r
+ Dev->OriginalPciAttributes,\r
+ NULL\r
+ );\r
+\r
+ gBS->CloseProtocol (\r
+ ControllerHandle,\r
+ &gEfiPciIoProtocolGuid,\r
+ This->DriverBindingHandle,\r
+ ControllerHandle\r
+ );\r
+\r
FreePool (Dev);\r
\r
return Status;\r
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