-VOID\r
-MemMapInitialization (\r
- EFI_PHYSICAL_ADDRESS TopOfMemory\r
- )\r
-{\r
- //\r
- // Create Memory Type Information HOB\r
- //\r
- BuildGuidDataHob (\r
- &gEfiMemoryTypeInformationGuid,\r
- mDefaultMemoryTypeInformation,\r
- sizeof(mDefaultMemoryTypeInformation)\r
- );\r
-\r
- //\r
- // Add PCI IO Port space available for PCI resource allocations.\r
- //\r
- BuildResourceDescriptorHob (\r
- EFI_RESOURCE_IO,\r
- EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED,\r
- 0xC000,\r
- 0x4000\r
- );\r
-\r
- //\r
- // Video memory + Legacy BIOS region\r
- //\r
- AddIoMemoryRangeHob (0x0A0000, BASE_1MB);\r
-\r
- //\r
- // address purpose size\r
- // ------------ -------- -------------------------\r
- // max(top, 2g) PCI MMIO 0xFC000000 - max(top, 2g)\r
- // 0xFC000000 gap 44 MB\r
- // 0xFEC00000 IO-APIC 4 KB\r
- // 0xFEC01000 gap 1020 KB\r
- // 0xFED00000 HPET 1 KB\r
- // 0xFED00400 gap 1023 KB\r
- // 0xFEE00000 LAPIC 1 MB\r
- //\r
- AddIoMemoryRangeHob (TopOfMemory < BASE_2GB ? BASE_2GB : TopOfMemory, 0xFC000000);\r
- AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_4KB);\r
- AddIoMemoryBaseSizeHob (0xFED00000, SIZE_1KB);\r
- AddIoMemoryBaseSizeHob (PcdGet32(PcdCpuLocalApicBaseAddress), SIZE_1MB);\r
-}\r
-\r
-\r