OvmfPkg/PlatformPei: program MSR_IA32_FEATURE_CONTROL from fw_cfg

[mirror_edk2.git] / OvmfPkg / PlatformPei / Platform.h

diff --git a/OvmfPkg/PlatformPei/Platform.h b/OvmfPkg/PlatformPei/Platform.h
index 383e6a43646b0d1e79b81496f23ba35a184fb705..eda765be30dee46de7d1d362456d7f5c44e15a89 100644 (file)
--- a/OvmfPkg/PlatformPei/Platform.h
+++ b/OvmfPkg/PlatformPei/Platform.h
@@ -1,7 +1,7 @@
 /** @file\r
   Platform PEI module include file.\r
 \r
-  Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -15,6 +15,8 @@
 #ifndef _PLATFORM_PEI_H_INCLUDED_\r
 #define _PLATFORM_PEI_H_INCLUDED_\r
 \r
+#include <IndustryStandard/E820.h>\r
+\r
 VOID\r
 AddIoMemoryBaseSizeHob (\r
   EFI_PHYSICAL_ADDRESS        MemoryBase,\r
@@ -40,25 +42,29 @@ AddMemoryRangeHob (
   );\r
 \r
 VOID\r
-AddUntestedMemoryBaseSizeHob (\r
+AddReservedMemoryBaseSizeHob (\r
   EFI_PHYSICAL_ADDRESS        MemoryBase,\r
-  UINT64                      MemorySize\r
+  UINT64                      MemorySize,\r
+  BOOLEAN                     Cacheable\r
   );\r
 \r
 VOID\r
-AddReservedMemoryBaseSizeHob (\r
-  EFI_PHYSICAL_ADDRESS        MemoryBase,\r
-  UINT64                      MemorySize\r
+AddressWidthInitialization (\r
+  VOID\r
   );\r
 \r
-VOID\r
-AddUntestedMemoryRangeHob (\r
-  EFI_PHYSICAL_ADDRESS        MemoryBase,\r
-  EFI_PHYSICAL_ADDRESS        MemoryLimit\r
+EFI_STATUS\r
+PublishPeiMemory (\r
+  VOID\r
   );\r
 \r
-EFI_PHYSICAL_ADDRESS\r
-MemDetect (\r
+UINT32\r
+GetSystemMemorySizeBelow4gb (\r
+  VOID\r
+  );\r
+\r
+VOID\r
+InitializeRamRegions (\r
   VOID\r
   );\r
 \r
@@ -67,9 +73,32 @@ PeiFvInitialization (
   VOID\r
   );\r
 \r
+VOID\r
+InstallFeatureControlCallback (\r
+  VOID\r
+  );\r
+\r
 EFI_STATUS\r
 InitializeXen (\r
   VOID\r
   );\r
 \r
+BOOLEAN\r
+XenDetect (\r
+  VOID\r
+  );\r
+\r
+extern BOOLEAN mXen;\r
+\r
+VOID\r
+XenPublishRamRegions (\r
+  VOID\r
+  );\r
+\r
+extern EFI_BOOT_MODE mBootMode;\r
+\r
+extern BOOLEAN mS3Supported;\r
+\r
+extern UINT8 mPhysMemAddressWidth;\r
+\r
 #endif // _PLATFORM_PEI_H_INCLUDED_\r