OvmfPkg/PlatformPei: Set memory encryption PCD when SEV is enabled

[mirror_edk2.git] / OvmfPkg / PlatformPei / PlatformPei.inf

diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/PlatformPei.inf
index a5fa9b5004d7c837ef13f930681dae13ce34f3bd..16a8db7b0bd2ed0cf31be80d2cc483f99553ce17 100644 (file)
--- a/OvmfPkg/PlatformPei/PlatformPei.inf
+++ b/OvmfPkg/PlatformPei/PlatformPei.inf
@@ -2,7 +2,7 @@
 #  Platform PEI driver\r
 #\r
 #  This module provides platform specific function to detect boot mode.\r
-#  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+#  Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
 #\r
 #  This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r
@@ -29,7 +29,9 @@
 #\r
 \r
 [Sources]\r
+  AmdSev.c\r
   Cmos.c\r
+  FeatureControl.c\r
   Fv.c\r
   MemDetect.c\r
   Platform.c\r
@@ -47,6 +49,7 @@
   gEfiXenInfoGuid\r
 \r
 [LibraryClasses]\r
+  BaseLib\r
   DebugLib\r
   HobLib\r
   IoLib\r
@@ -56,7 +59,9 @@
   PeiServicesTablePointerLib\r
   PeimEntryPoint\r
   QemuFwCfgLib\r
+  QemuFwCfgS3Lib\r
   MtrrLib\r
+  MemEncryptSevLib\r
   PcdLib\r
 \r
 [Pcd]\r
@@ -64,8 +69,6 @@
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdAcpiPmBaseAddress\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdS3AcpiReservedMemoryBase\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase\r
@@ -73,17 +76,40 @@
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize\r
   gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize\r
-  gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdS3AcpiReservedMemorySize\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes\r
   gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress\r
-  gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration\r
+  gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode\r
+  gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable\r
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack\r
+  gEfiMdeModulePkgTokenSpaceGuid.PcdPropertiesTableEnable\r
+  gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable\r
+  gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask\r
   gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress\r
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber\r
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds\r
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize\r
+\r
+[FixedPcd]\r
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress\r
+\r
+[FeaturePcd]\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire\r
 \r
 [Ppis]\r
   gEfiPeiMasterBootModePpiGuid\r
+  gEfiPeiMpServicesPpiGuid\r
 \r
 [Depex]\r
   TRUE\r