OvmfPkg: factor the IO aperture shared by all PCI root bridges into PCDs

[mirror_edk2.git] / OvmfPkg / PlatformPei / PlatformPei.inf

diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/PlatformPei.inf
index 7c646ab8a01279138c44952621173dfeeeae1990..22250c061c4730a64d5496baabbf23b4a008c76c 100644 (file)
--- a/OvmfPkg/PlatformPei/PlatformPei.inf
+++ b/OvmfPkg/PlatformPei/PlatformPei.inf
@@ -2,7 +2,7 @@
 #  Platform PEI driver\r
 #\r
 #  This module provides platform specific function to detect boot mode.\r
-#  Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>\r
+#  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
 #\r
 #  This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r
@@ -36,6 +36,7 @@
   Xen.c\r
 \r
 [Packages]\r
+  IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec\r
   MdePkg/MdePkg.dec\r
   MdeModulePkg/MdeModulePkg.dec\r
   UefiCpuPkg/UefiCpuPkg.dec\r
@@ -46,6 +47,7 @@
   gEfiXenInfoGuid\r
 \r
 [LibraryClasses]\r
+  BaseLib\r
   DebugLib\r
   HobLib\r
   IoLib\r
@@ -54,6 +56,7 @@
   PeiServicesLib\r
   PeiServicesTablePointerLib\r
   PeimEntryPoint\r
+  QemuFwCfgLib\r
   MtrrLib\r
   PcdLib\r
 \r
@@ -63,13 +66,35 @@
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize\r
   gUefiOvmfPkgTokenSpaceGuid.PcdAcpiPmBaseAddress\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdS3AcpiReservedMemoryBase\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes\r
+  gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdS3AcpiReservedMemorySize\r
+  gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration\r
+  gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode\r
+  gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable\r
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack\r
+  gEfiMdeModulePkgTokenSpaceGuid.PcdPropertiesTableEnable\r
   gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress\r
 \r
+[FeaturePcd]\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire\r
+\r
 [Ppis]\r
   gEfiPeiMasterBootModePpiGuid\r
 \r