OvmfPkg/PlatformPei: program MSR_IA32_FEATURE_CONTROL from fw_cfg

[mirror_edk2.git] / OvmfPkg / PlatformPei / PlatformPei.inf

diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/PlatformPei.inf
index 0307bca913c15aeec1300753a99281dd25c9dc44..776a4ab11f7900660d5ff032b02e7c054279354e 100644 (file)
--- a/OvmfPkg/PlatformPei/PlatformPei.inf
+++ b/OvmfPkg/PlatformPei/PlatformPei.inf
@@ -2,7 +2,7 @@
 #  Platform PEI driver\r
 #\r
 #  This module provides platform specific function to detect boot mode.\r
-#  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+#  Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
 #\r
 #  This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r
@@ -30,6 +30,7 @@
 \r
 [Sources]\r
   Cmos.c\r
+  FeatureControl.c\r
   Fv.c\r
   MemDetect.c\r
   Platform.c\r
@@ -47,6 +48,7 @@
   gEfiXenInfoGuid\r
 \r
 [LibraryClasses]\r
+  BaseLib\r
   DebugLib\r
   HobLib\r
   IoLib\r
@@ -64,8 +66,6 @@
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdAcpiPmBaseAddress\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdS3AcpiReservedMemoryBase\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase\r
@@ -74,17 +74,38 @@
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize\r
   gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId\r
-  gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdS3AcpiReservedMemorySize\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes\r
   gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration\r
+  gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode\r
+  gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable\r
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack\r
+  gEfiMdeModulePkgTokenSpaceGuid.PcdPropertiesTableEnable\r
+  gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable\r
   gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress\r
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber\r
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize\r
+\r
+[FixedPcd]\r
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress\r
+\r
+[FeaturePcd]\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire\r
 \r
 [Ppis]\r
   gEfiPeiMasterBootModePpiGuid\r
+  gEfiPeiMpServicesPpiGuid\r
 \r
 [Depex]\r
   TRUE\r