;------------------------------------------------------------------------------\r
+; @file\r
+; First code exectuted by processor after resetting.\r
;\r
-; Copyright (c) 2008, Intel Corporation\r
+; Copyright (c) 2008 - 2009, Intel Corporation\r
; All rights reserved. This program and the accompanying materials\r
; are licensed and made available under the terms and conditions of the BSD License\r
; which accompanies this distribution. The full text of the license may be found at\r
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
;\r
-; Module Name:\r
-;\r
-; Reset-16Bit-vft0.asm\r
-;\r
-; Abstract:\r
-;\r
-; First code exectuted by processor after resetting.\r
-;\r
;------------------------------------------------------------------------------\r
\r
-BITS 16\r
-\r
-earlyInit_Real16:\r
+BITS 16\r
\r
- jmp real16InitSerialPort\r
-real16SerialPortInitReturn:\r
+ALIGN 16\r
\r
- jmp to32BitFlat\r
+applicationProcessorEntryPoint:\r
+;\r
+; Application Processors entry point\r
+;\r
+; GenFv generates code aligned on a 4k boundary which will jump to this\r
+; location. (0xffffffe0) This allows the Local APIC Startup IPI to be\r
+; used to wake up the application processors.\r
+;\r
+ jmp short EarlyApInitReal16\r
\r
-ALIGN 16\r
+ALIGN 8\r
\r
- DD 0, 0, 0\r
+ DD 0\r
\r
;\r
; The VTF signature\r
; any fixups.\r
;\r
vtfSignature:\r
- DB 'V', 'T', 'F', 0\r
+ DB 'V', 'T', 'F', 0\r
+\r
+ALIGN 16\r
\r
+resetVector:\r
;\r
; Reset Vector\r
;\r
; This is where the processor will begin execution\r
;\r
- jmp short earlyInit_Real16\r
+ wbinvd\r
+ jmp short EarlyBspInitReal16\r
\r
-ALIGN 16\r
+ALIGN 16\r
\r
fourGigabytes:\r
\r