OvmfPkg: Apply uncrustify changes

[mirror_edk2.git] / OvmfPkg / SmmAccess / SmramInternal.c

diff --git a/OvmfPkg/SmmAccess/SmramInternal.c b/OvmfPkg/SmmAccess/SmramInternal.c
index 0b07dc667b3fd885f2bba999ea0c9cd7ebcf54c1..d391ddc9aec111e2d0a35628c07214fe7f61eaec 100644 (file)
--- a/OvmfPkg/SmmAccess/SmramInternal.c
+++ b/OvmfPkg/SmmAccess/SmramInternal.c
@@ -19,13 +19,13 @@
 //\r
 // The value of PcdQ35TsegMbytes is saved into this variable at module startup.\r
 //\r
-UINT16 mQ35TsegMbytes;\r
+UINT16  mQ35TsegMbytes;\r
 \r
 //\r
 // The value of PcdQ35SmramAtDefaultSmbase is saved into this variable at\r
 // module startup.\r
 //\r
-STATIC BOOLEAN mQ35SmramAtDefaultSmbase;\r
+STATIC BOOLEAN  mQ35SmramAtDefaultSmbase;\r
 \r
 /**\r
   Save PcdQ35TsegMbytes into mQ35TsegMbytes.\r
@@ -65,11 +65,11 @@ InitQ35SmramAtDefaultSmbase (
 **/\r
 VOID\r
 GetStates (\r
-  OUT BOOLEAN *LockState,\r
-  OUT BOOLEAN *OpenState\r
-)\r
+  OUT BOOLEAN  *LockState,\r
+  OUT BOOLEAN  *OpenState\r
+  )\r
 {\r
-  UINT8 SmramVal, EsmramcVal;\r
+  UINT8  SmramVal, EsmramcVal;\r
 \r
   SmramVal   = PciRead8 (DRAMC_REGISTER_Q35 (MCH_SMRAM));\r
   EsmramcVal = PciRead8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC));\r
@@ -91,27 +91,30 @@ GetStates (
 \r
 EFI_STATUS\r
 SmramAccessOpen (\r
-  OUT BOOLEAN *LockState,\r
-  OUT BOOLEAN *OpenState\r
+  OUT BOOLEAN  *LockState,\r
+  OUT BOOLEAN  *OpenState\r
   )\r
 {\r
   //\r
   // Open TSEG by clearing T_EN.\r
   //\r
-  PciAnd8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC),\r
-    (UINT8)((~(UINT32)MCH_ESMRAMC_T_EN) & 0xff));\r
+  PciAnd8 (\r
+    DRAMC_REGISTER_Q35 (MCH_ESMRAMC),\r
+    (UINT8)((~(UINT32)MCH_ESMRAMC_T_EN) & 0xff)\r
+    );\r
 \r
   GetStates (LockState, OpenState);\r
   if (!*OpenState) {\r
     return EFI_DEVICE_ERROR;\r
   }\r
+\r
   return EFI_SUCCESS;\r
 }\r
 \r
 EFI_STATUS\r
 SmramAccessClose (\r
-  OUT BOOLEAN *LockState,\r
-  OUT BOOLEAN *OpenState\r
+  OUT BOOLEAN  *LockState,\r
+  OUT BOOLEAN  *OpenState\r
   )\r
 {\r
   //\r
@@ -123,13 +126,14 @@ SmramAccessClose (
   if (*OpenState) {\r
     return EFI_DEVICE_ERROR;\r
   }\r
+\r
   return EFI_SUCCESS;\r
 }\r
 \r
 EFI_STATUS\r
 SmramAccessLock (\r
-  OUT    BOOLEAN *LockState,\r
-  IN OUT BOOLEAN *OpenState\r
+  OUT    BOOLEAN  *LockState,\r
+  IN OUT BOOLEAN  *OpenState\r
   )\r
 {\r
   if (*OpenState) {\r
@@ -140,35 +144,38 @@ SmramAccessLock (
   // Close & lock TSEG by setting T_EN and D_LCK.\r
   //\r
   PciOr8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), MCH_ESMRAMC_T_EN);\r
-  PciOr8 (DRAMC_REGISTER_Q35 (MCH_SMRAM),   MCH_SMRAM_D_LCK);\r
+  PciOr8 (DRAMC_REGISTER_Q35 (MCH_SMRAM), MCH_SMRAM_D_LCK);\r
 \r
   //\r
   // Close & lock the SMRAM at the default SMBASE, if it exists.\r
   //\r
   if (mQ35SmramAtDefaultSmbase) {\r
-    PciWrite8 (DRAMC_REGISTER_Q35 (MCH_DEFAULT_SMBASE_CTL),\r
-      MCH_DEFAULT_SMBASE_LCK);\r
+    PciWrite8 (\r
+      DRAMC_REGISTER_Q35 (MCH_DEFAULT_SMBASE_CTL),\r
+      MCH_DEFAULT_SMBASE_LCK\r
+      );\r
   }\r
 \r
   GetStates (LockState, OpenState);\r
   if (*OpenState || !*LockState) {\r
     return EFI_DEVICE_ERROR;\r
   }\r
+\r
   return EFI_SUCCESS;\r
 }\r
 \r
 EFI_STATUS\r
 SmramAccessGetCapabilities (\r
-  IN BOOLEAN                  LockState,\r
-  IN BOOLEAN                  OpenState,\r
-  IN OUT UINTN                *SmramMapSize,\r
-  IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap\r
+  IN BOOLEAN                   LockState,\r
+  IN BOOLEAN                   OpenState,\r
+  IN OUT UINTN                 *SmramMapSize,\r
+  IN OUT EFI_SMRAM_DESCRIPTOR  *SmramMap\r
   )\r
 {\r
-  UINTN  OriginalSize;\r
-  UINT32 TsegMemoryBaseMb, TsegMemoryBase;\r
-  UINT64 CommonRegionState;\r
-  UINT8  TsegSizeBits;\r
+  UINTN   OriginalSize;\r
+  UINT32  TsegMemoryBaseMb, TsegMemoryBase;\r
+  UINT64  CommonRegionState;\r
+  UINT8   TsegSizeBits;\r
 \r
   OriginalSize  = *SmramMapSize;\r
   *SmramMapSize = DescIdxCount * sizeof *SmramMap;\r
@@ -180,7 +187,7 @@ SmramAccessGetCapabilities (
   // Read the TSEG Memory Base register.\r
   //\r
   TsegMemoryBaseMb = PciRead32 (DRAMC_REGISTER_Q35 (MCH_TSEGMB));\r
-  TsegMemoryBase = (TsegMemoryBaseMb >> MCH_TSEGMB_MB_SHIFT) << 20;\r
+  TsegMemoryBase   = (TsegMemoryBaseMb >> MCH_TSEGMB_MB_SHIFT) << 20;\r
 \r
   //\r
   // Precompute the region state bits that will be set for all regions.\r
@@ -198,7 +205,7 @@ SmramAccessGetCapabilities (
   SmramMap[DescIdxSmmS3ResumeState].CpuStart      = TsegMemoryBase;\r
   SmramMap[DescIdxSmmS3ResumeState].PhysicalSize  =\r
     EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (sizeof (SMM_S3_RESUME_STATE)));\r
-  SmramMap[DescIdxSmmS3ResumeState].RegionState   =\r
+  SmramMap[DescIdxSmmS3ResumeState].RegionState =\r
     CommonRegionState | EFI_ALLOCATED;\r
 \r
   //\r
@@ -213,7 +220,7 @@ SmramAccessGetCapabilities (
   SmramMap[DescIdxMain].PhysicalStart =\r
     SmramMap[DescIdxSmmS3ResumeState].PhysicalStart +\r
     SmramMap[DescIdxSmmS3ResumeState].PhysicalSize;\r
-  SmramMap[DescIdxMain].CpuStart = SmramMap[DescIdxMain].PhysicalStart;\r
+  SmramMap[DescIdxMain].CpuStart     = SmramMap[DescIdxMain].PhysicalStart;\r
   SmramMap[DescIdxMain].PhysicalSize =\r
     (TsegSizeBits == MCH_ESMRAMC_TSEG_8MB ? SIZE_8MB :\r
      TsegSizeBits == MCH_ESMRAMC_TSEG_2MB ? SIZE_2MB :\r