#include <Library/DebugLib.h>\r
#include <IndustryStandard/Acpi.h>\r
\r
-GUID mFrequencyHobGuid = { 0x3fca54f6, 0xe1a2, 0x4b20, { 0xbe, 0x76, 0x92, 0x6b, 0x4b, 0x48, 0xbf, 0xaa }};\r
+GUID mFrequencyHobGuid = {\r
+ 0x3fca54f6, 0xe1a2, 0x4b20, { 0xbe, 0x76, 0x92, 0x6b, 0x4b, 0x48, 0xbf, 0xaa }\r
+};\r
\r
/**\r
Internal function to retrieves the 64-bit frequency in Hz.\r
VOID\r
)\r
{\r
- UINTN Bus;\r
- UINTN Device;\r
- UINTN Function;\r
- UINTN EnableRegister;\r
- UINT8 EnableMask;\r
+ UINTN Bus;\r
+ UINTN Device;\r
+ UINTN Function;\r
+ UINTN EnableRegister;\r
+ UINT8 EnableMask;\r
\r
//\r
// ASSERT for the invalid PCD values. They must be configured to the real value.\r
//\r
// ASSERT for the invalid PCD values. They must be configured to the real value.\r
//\r
- ASSERT (PcdGet8 (PcdAcpiIoPciDeviceNumber) != 0xFF);\r
- ASSERT (PcdGet8 (PcdAcpiIoPciFunctionNumber) != 0xFF);\r
+ ASSERT (PcdGet8 (PcdAcpiIoPciDeviceNumber) != 0xFF);\r
+ ASSERT (PcdGet8 (PcdAcpiIoPciFunctionNumber) != 0xFF);\r
ASSERT (PcdGet16 (PcdAcpiIoPciEnableRegisterOffset) != 0xFFFF);\r
\r
//\r
// Retrieve the PCD values for the PCI configuration space required to program the ACPI I/O Port Base Address\r
//\r
- Bus = PcdGet8 (PcdAcpiIoPciBusNumber);\r
- Device = PcdGet8 (PcdAcpiIoPciDeviceNumber);\r
- Function = PcdGet8 (PcdAcpiIoPciFunctionNumber);\r
+ Bus = PcdGet8 (PcdAcpiIoPciBusNumber);\r
+ Device = PcdGet8 (PcdAcpiIoPciDeviceNumber);\r
+ Function = PcdGet8 (PcdAcpiIoPciFunctionNumber);\r
EnableRegister = PcdGet16 (PcdAcpiIoPciEnableRegisterOffset);\r
- EnableMask = PcdGet8 (PcdAcpiIoBarEnableMask);\r
+ EnableMask = PcdGet8 (PcdAcpiIoBarEnableMask);\r
\r
//\r
// If ACPI I/O space is not enabled yet, program ACPI I/O base address and enable it.\r
// value other than PcdAcpiIoPortBaseAddress\r
//\r
if (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0x0000) {\r
- Port = PciRead16 (PCI_LIB_ADDRESS (\r
- PcdGet8 (PcdAcpiIoPciBusNumber),\r
- PcdGet8 (PcdAcpiIoPciDeviceNumber),\r
- PcdGet8 (PcdAcpiIoPciFunctionNumber),\r
- PcdGet16 (PcdAcpiIoPciBarRegisterOffset)\r
- ));\r
+ Port = PciRead16 (\r
+ PCI_LIB_ADDRESS (\r
+ PcdGet8 (PcdAcpiIoPciBusNumber),\r
+ PcdGet8 (PcdAcpiIoPciDeviceNumber),\r
+ PcdGet8 (PcdAcpiIoPciFunctionNumber),\r
+ PcdGet16 (PcdAcpiIoPciBarRegisterOffset)\r
+ )\r
+ );\r
}\r
\r
return (Port & PcdGet16 (PcdAcpiIoPortBaseAddressMask)) + PcdGet16 (PcdAcpiPm1TmrOffset);\r
IN UINT32 Delay\r
)\r
{\r
- UINT16 Port;\r
- UINT32 Ticks;\r
- UINT32 Times;\r
+ UINT16 Port;\r
+ UINT32 Ticks;\r
+ UINT32 Times;\r
\r
Port = InternalAcpiGetAcpiTimerIoPort ();\r
Times = Delay >> 22;\r
if (EndValue != NULL) {\r
*EndValue = 0xffffffffffffffffULL;\r
}\r
+\r
return InternalGetPerformanceCounterFrequency ();\r
}\r
\r
// Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,\r
// i.e. highest bit set in Remainder should <= 33.\r
//\r
- Shift = MAX (0, HighBitSet64 (Remainder) - 33);\r
- Remainder = RShiftU64 (Remainder, (UINTN) Shift);\r
- Frequency = RShiftU64 (Frequency, (UINTN) Shift);\r
+ Shift = MAX (0, HighBitSet64 (Remainder) - 33);\r
+ Remainder = RShiftU64 (Remainder, (UINTN)Shift);\r
+ Frequency = RShiftU64 (Frequency, (UINTN)Shift);\r
NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);\r
\r
return NanoSeconds;\r
VOID\r
)\r
{\r
- UINT64 StartTSC;\r
- UINT64 EndTSC;\r
- UINT16 TimerAddr;\r
- UINT32 Ticks;\r
- UINT64 TscFrequency;\r
- BOOLEAN InterruptState;\r
+ UINT64 StartTSC;\r
+ UINT64 EndTSC;\r
+ UINT16 TimerAddr;\r
+ UINT32 Ticks;\r
+ UINT64 TscFrequency;\r
+ BOOLEAN InterruptState;\r
\r
InterruptState = SaveAndDisableInterrupts ();\r
\r
// the while loop will exit.\r
//\r
while (((Ticks - IoBitFieldRead32 (TimerAddr, 0, 23)) & BIT23) == 0) {\r
- CpuPause();\r
+ CpuPause ();\r
}\r
+\r
EndTSC = AsmReadTsc (); // TSC value 101.4 us later\r
\r
TscFrequency = MultU64x32 (\r