#\r
# Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>\r
# Copyright (c) 2017, AMD Inc. All rights reserved.<BR>\r
+# Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.<BR>\r
#\r
# SPDX-License-Identifier: BSD-2-Clause-Patent\r
#\r
# @Prompt Configure HPET to use MSI.\r
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetMsiEnable|TRUE|BOOLEAN|0x00001000\r
\r
+ ## Indicates the RTC port registers are in MMIO space, or in I/O space.\r
+ # Default is I/O space.<BR><BR>\r
+ # TRUE - RTC port registers are in MMIO space.<BR>\r
+ # FALSE - RTC port registers are in I/O space.<BR>\r
+ # @Prompt RTC port registers use MMIO.\r
+ gPcAtChipsetPkgTokenSpaceGuid.PcdRtcUseMmio|FALSE|BOOLEAN|0x00000021\r
+\r
[PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, PcdsPatchableInModule]\r
## This PCD specifies the base address of the HPET timer.\r
# @Prompt HPET base address.\r
# @Expression 0x80000001 | gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear < gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear + 100\r
gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear|2097|UINT16|0x0000000E\r
\r
+ ## Specifies RTC Index Register address in MMIO space.\r
+ # @Prompt RTC Index Register address\r
+ gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister64|0x0|UINT64|0x00000022\r
+\r
+ ## Specifies RTC Target Register address in MMIO space.\r
+ # @Prompt RTC Target Register address\r
+ gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister64|0x0|UINT64|0x00000023\r
+\r
[PcdsFixedAtBuild, PcdsPatchableInModule]\r
## Defines the ACPI register set base address.\r
# The invalid 0xFFFF is as its default value. It must be configured to the real value.\r