Clean up code.

[mirror_edk2.git] / PcAtChipsetPkg / PcAtChipsetPkg.dec

diff --git a/PcAtChipsetPkg/PcAtChipsetPkg.dec b/PcAtChipsetPkg/PcAtChipsetPkg.dec
index 747fcde241cc49c36d5411cba506957e4e510eb3..7bf0760c5fd302cc974548660aa81b33507d43c9 100644 (file)
--- a/PcAtChipsetPkg/PcAtChipsetPkg.dec
+++ b/PcAtChipsetPkg/PcAtChipsetPkg.dec
@@ -4,9 +4,9 @@
 # This package is designed to public interfaces and implementation which follows\r
 # PcAt defacto standard.\r
 #\r
-# Copyright (c) 2009 - 2010, Intel Corporation.\r
+# Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.<BR>\r
 #\r
-# All rights reserved. This program and the accompanying materials\r
+# This program and the accompanying materials\r
 # are licensed and made available under the terms and conditions of the BSD License\r
 # which accompanies this distribution. The full text of the license may be found at\r
 # http://opensource.org/licenses/bsd-license.php\r
@@ -20,9 +20,25 @@
   DEC_SPECIFICATION              = 0x00010005\r
   PACKAGE_NAME                   = PcAtChipsetPkg\r
   PACKAGE_GUID                   = B728689A-52D3-4b8c-AE89-2CE5514CC6DC\r
-  PACKAGE_VERSION                = 0.1\r
+  PACKAGE_VERSION                = 0.3\r
 \r
-[PcdsFixedAtBuild]\r
+[Includes]\r
+  Include\r
+\r
+[LibraryClasses]\r
+  ##  @libraryclass  Provides functions to manage I/O APIC Redirection Table Entries.\r
+  #\r
+  IoApicLib|Include/Library/IoApicLib.h\r
+  \r
+[Guids]\r
+  gPcAtChipsetPkgTokenSpaceGuid = { 0x326ae723, 0xae32, 0x4589, { 0x98, 0xb8, 0xca, 0xc2, 0x3c, 0xdc, 0xc1, 0xb1 } }\r
+\r
+[PcdsFeatureFlag]\r
+  ## If TRUE, then the HPET Timer will be configured to use MSI interrupts if the HPET timer supports them.\r
+  #  If FALSE, then the HPET Timer will be configued to use I/O APIC interrupts.\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdHpetMsiEnable|TRUE|BOOLEAN|0x00001000\r
+  \r
+[PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, PcdsPatchableInModule]\r
   ## Pcd8259LegacyModeMask defines the default mask value for platform. This value is determined\r
   #  1) If platform only support pure UEFI, value should be set to 0xFFFF or 0xFFFE;\r
   #     Because only clock interrupt is allowed in legacy mode in pure UEFI platform.\r
@@ -34,17 +50,43 @@
   #     b) If all thunk call provied by CSM binary do not require legacy interrupt support, value should be set\r
   #        to 0xFFFF or 0xFFFE.\r
   #\r
-  #  Because the value is used as intialization value, PCD's type should be FixedAtBuild.\r
-  #\r
   #  The default value of legacy mode mask could be changed by EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely\r
   #  need change it except some special cases such as when initializing the CSM binary, it should be set to 0xFFFF to \r
   #  mask all legacy interrupt. Please restore the original legacy mask value if changing is made for these special case.\r
   #\r
-  gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0x00000001|UINT16|0xFFFF\r
+  gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x00000001\r
   \r
   ## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy mode's interrrupt controller.\r
-  gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x00000002|UINT16|0x0000\r
-  \r
-[Guids]\r
-  gPcAtChipsetPkgTokenSpaceGuid = { 0x326ae723, 0xae32, 0x4589, { 0x98, 0xb8, 0xca, 0xc2, 0x3c, 0xdc, 0xc1, 0xb1 } }\r
+  gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x00000002\r
 \r
+  ## This PCD specifies whether we need enable IsaAcpiCom1 device.\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiCom1Enable|TRUE|BOOLEAN|0x00000003\r
+\r
+  ## This PCD specifies whether we need enable IsaAcpiCom2 device.\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiCom2Enable|TRUE|BOOLEAN|0x00000004\r
+\r
+  ## This PCD specifies whether we need enable IsaAcpiPs2Keyboard device.\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiPs2KeyboardEnable|TRUE|BOOLEAN|0x00000005\r
+\r
+  ## This PCD specifies whether we need enable IsaAcpiPs2Mouse device.\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiPs2MouseEnable|TRUE|BOOLEAN|0x00000006\r
+\r
+  ## This PCD specifies whether we need enable IsaAcpiFloppyA device.\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiFloppyAEnable|TRUE|BOOLEAN|0x00000007\r
+\r
+  ## This PCD specifies whether we need enable IsaAcpiFloppyB device.\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiFloppyBEnable|TRUE|BOOLEAN|0x00000008\r
+\r
+  ## This PCD specifies the base address of the HPET timer.\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdHpetBaseAddress|0xFED00000|UINT32|0x00000009\r
+\r
+  ## This PCD specifies the Local APIC Interrupt Vector for the HPET Timer.\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdHpetLocalApicVector|0x40|UINT8|0x0000000A\r
+\r
+  ## This PCD specifies the defaut period of the HPET Timer in 100 ns units.\r
+  #  The default value of 100000 100 ns units is the same as 10 ms.\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdHpetDefaultTimerPeriod|100000|UINT64|0x0000000B\r
+  \r
+  ## This PCD specifies the base address of the HPET timer.\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdIoApicBaseAddress|0xFEC00000|UINT32|0x0000000C\r
+  \r