# This package is designed to public interfaces and implementation which follows\r
# PcAt defacto standard.\r
#\r
-# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>\r
# Copyright (c) 2017, AMD Inc. All rights reserved.<BR>\r
+# Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.<BR>\r
#\r
# SPDX-License-Identifier: BSD-2-Clause-Patent\r
#\r
# @Prompt Configure HPET to use MSI.\r
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetMsiEnable|TRUE|BOOLEAN|0x00001000\r
\r
-[PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, PcdsPatchableInModule]\r
- ## Pcd8259LegacyModeMask defines the default mask value for platform. This value is determined<BR><BR>\r
- # 1) If platform only support pure UEFI, value should be set to 0xFFFF or 0xFFFE;\r
- # Because only clock interrupt is allowed in legacy mode in pure UEFI platform.<BR>\r
- # 2) If platform install CSM and use thunk module:<BR>\r
- # a) If thunk call provided by CSM binary requires some legacy interrupt support, the corresponding bit\r
- # should be opened as 0.<BR>\r
- # For example, if keyboard interfaces provided CSM binary use legacy keyboard interrupt in 8259 bit 1, then\r
- # the value should be set to 0xFFFC.<BR>\r
- # b) If all thunk call provied by CSM binary do not require legacy interrupt support, value should be set\r
- # to 0xFFFF or 0xFFFE.<BR>\r
- #\r
- # The default value of legacy mode mask could be changed by EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely\r
- # need change it except some special cases such as when initializing the CSM binary, it should be set to 0xFFFF to\r
- # mask all legacy interrupt. Please restore the original legacy mask value if changing is made for these special case.<BR>\r
- # @Prompt 8259 Legacy Mode mask.\r
- gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x00000001\r
-\r
- ## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy mode's interrrupt controller.\r
- # For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.\r
- # @Prompt 8259 Legacy Mode edge level.\r
- gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x00000002\r
-\r
- ## Indicates if we need enable IsaAcpiCom1 device.<BR><BR>\r
- # TRUE - Enables IsaAcpiCom1 device.<BR>\r
- # FALSE - Doesn't enable IsaAcpiCom1 device.<BR>\r
- # @Prompt Enable IsaAcpiCom1 device.\r
- gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiCom1Enable|TRUE|BOOLEAN|0x00000003\r
-\r
- ## Indicates if we need enable IsaAcpiCom2 device.<BR><BR>\r
- # TRUE - Enables IsaAcpiCom2 device.<BR>\r
- # FALSE - Doesn't enable IsaAcpiCom2 device.<BR>\r
- # @Prompt Enable IsaAcpiCom12 device.\r
- gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiCom2Enable|TRUE|BOOLEAN|0x00000004\r
-\r
- ## Indicates if we need enable IsaAcpiPs2Keyboard device.<BR><BR>\r
- # TRUE - Enables IsaAcpiPs2Keyboard device.<BR>\r
- # FALSE - Doesn't enable IsaAcpiPs2Keyboard device.<BR>\r
- # @Prompt Enable IsaAcpiPs2Keyboard device.\r
- gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiPs2KeyboardEnable|TRUE|BOOLEAN|0x00000005\r
-\r
- ## Indicates if we need enable IsaAcpiPs2Mouse device.<BR><BR>\r
- # TRUE - Enables IsaAcpiPs2Mouse device.<BR>\r
- # FALSE - Doesn't enable IsaAcpiPs2Mouse device.<BR>\r
- # @Prompt Enable IsaAcpiPs2Mouse device.\r
- gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiPs2MouseEnable|TRUE|BOOLEAN|0x00000006\r
-\r
- ## Indicates if we need enable IsaAcpiFloppyA device.<BR><BR>\r
- # TRUE - Enables IsaAcpiFloppyA device.<BR>\r
- # FALSE - Doesn't enable IsaAcpiFloppyA device.<BR>\r
- # @Prompt Enable IsaAcpiFloppyA device.\r
- gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiFloppyAEnable|TRUE|BOOLEAN|0x00000007\r
-\r
- ## Indicates if we need enable IsaAcpiFloppyB device.<BR><BR>\r
- # TRUE - Enables IsaAcpiFloppyB device.<BR>\r
- # FALSE - Doesn't enable IsaAcpiFloppyB device.<BR>\r
- # @Prompt Enable IsaAcpiFloppyB device.\r
- gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiFloppyBEnable|TRUE|BOOLEAN|0x00000008\r
+ ## Indicates the RTC port registers are in MMIO space, or in I/O space.\r
+ # Default is I/O space.<BR><BR>\r
+ # TRUE - RTC port registers are in MMIO space.<BR>\r
+ # FALSE - RTC port registers are in I/O space.<BR>\r
+ # @Prompt RTC port registers use MMIO.\r
+ gPcAtChipsetPkgTokenSpaceGuid.PcdRtcUseMmio|FALSE|BOOLEAN|0x00000021\r
\r
+[PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, PcdsPatchableInModule]\r
## This PCD specifies the base address of the HPET timer.\r
# @Prompt HPET base address.\r
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetBaseAddress|0xFED00000|UINT32|0x00000009\r
# @Prompt HPET local APIC vector.\r
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetLocalApicVector|0x40|UINT8|0x0000000A\r
\r
- ## This PCD specifies the defaut period of the HPET Timer in 100 ns units.\r
+ ## This PCD specifies the default period of the HPET Timer in 100 ns units.\r
# The default value of 100000 100 ns units is the same as 10 ms.\r
# @Prompt Default period of HPET timer.\r
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetDefaultTimerPeriod|100000|UINT64|0x0000000B\r
# @Expression 0x80000001 | gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear < gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear + 100\r
gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear|2097|UINT16|0x0000000E\r
\r
+ ## Specifies RTC Index Register address in MMIO space.\r
+ # @Prompt RTC Index Register address\r
+ gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister64|0x0|UINT64|0x00000022\r
+\r
+ ## Specifies RTC Target Register address in MMIO space.\r
+ # @Prompt RTC Target Register address\r
+ gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister64|0x0|UINT64|0x00000023\r
+\r
+ ## Specifies RTC Index Register address in I/O space.\r
+ # @Prompt RTC Index Register address\r
+ gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister|0x70|UINT8|0x0000001E\r
+\r
+ ## Specifies RTC Target Register address in I/O space.\r
+ # @Prompt RTC Target Register address\r
+ gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister|0x71|UINT8|0x0000001F\r
+\r
[PcdsFixedAtBuild, PcdsPatchableInModule]\r
## Defines the ACPI register set base address.\r
# The invalid 0xFFFF is as its default value. It must be configured to the real value.\r
# @Prompt Initial value for Register_D in RTC.\r
gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterD|0x00|UINT8|0x0000001D\r
\r
- ## Specifies RTC Index Register address in I/O space.\r
- # @Prompt RTC Index Register address\r
- gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister|0x70|UINT8|0x0000001E\r
-\r
- ## Specifies RTC Target Register address in I/O space.\r
- # @Prompt RTC Target Register address\r
- gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister|0x71|UINT8|0x0000001F\r
+ ## RTC Update Timeout Value(microsecond).\r
+ # @Prompt RTC Update Timeout Value.\r
+ gPcAtChipsetPkgTokenSpaceGuid.PcdRealTimeClockUpdateTimeout|100000|UINT32|0x00000020\r
\r
[UserExtensions.TianoCore."ExtraFiles"]\r
PcAtChipsetPkgExtra.uni\r
projects / mirror_edk2.git / blobdiff