//\r
// Implementation\r
//\r
+\r
/**\r
Entry point of this driver\r
\r
required here. This notification can be used to perform any chipsetspecific\r
programming.\r
\r
- @param[in] PciResAlloc The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
+ @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
@param[in] Phase The phase during enumeration\r
\r
@retval EFI_NOT_READY This phase cannot be entered at this time. For example, this error\r
//\r
// Get the number of '1' in Alignment.\r
//\r
- BitsOfAlignment = HighBitSet64 (RootBridgeInstance->ResAllocNode[Index].Alignment) + 1;\r
+ BitsOfAlignment = (UINTN) (HighBitSet64 (RootBridgeInstance->ResAllocNode[Index].Alignment) + 1);\r
\r
switch (Index) {\r
\r
For D945 implementation, there is only one root bridge in PCI host bridge.\r
\r
@param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
- @param[in][out] RootBridgeHandle Returns the device handle of the next PCI root bridge.\r
+ @param[in, out] RootBridgeHandle Returns the device handle of the next PCI root bridge.\r
\r
@retval EFI_SUCCESS If parameter RootBridgeHandle = NULL, then return the first Rootbridge handle of the\r
specific Host bridge and return EFI_SUCCESS. \r
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r
UINT8 *Temp;\r
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *ptr;\r
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;\r
UINT64 AddrLen;\r
UINT64 Alignment;\r
\r
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
if (RootBridgeHandle == RootBridgeInstance->Handle) {\r
while ( *Temp == 0x8A) {\r
- ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;\r
+ Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;\r
\r
//\r
// Check Address Length\r
//\r
- if (ptr->AddrLen > 0xffffffff) {\r
+ if (Ptr->AddrLen > 0xffffffff) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
//\r
// Check address range alignment\r
//\r
- if (ptr->AddrRangeMax >= 0xffffffff || ptr->AddrRangeMax != (GetPowerOfTwo64 (ptr->AddrRangeMax + 1) - 1)) {\r
+ if (Ptr->AddrRangeMax >= 0xffffffff || Ptr->AddrRangeMax != (GetPowerOfTwo64 (Ptr->AddrRangeMax + 1) - 1)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- switch (ptr->ResType) {\r
+ switch (Ptr->ResType) {\r
\r
case 0:\r
\r
//\r
// Check invalid Address Sapce Granularity\r
//\r
- if (ptr->AddrSpaceGranularity != 32) {\r
+ if (Ptr->AddrSpaceGranularity != 32) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
// check the memory resource request is supported by PCI root bridge\r
//\r
if (RootBridgeInstance->RootBridgeAttrib == EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM &&\r
- ptr->SpecificFlag == 0x06) {\r
+ Ptr->SpecificFlag == 0x06) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- AddrLen = ptr->AddrLen;\r
- Alignment = ptr->AddrRangeMax;\r
- if (ptr->AddrSpaceGranularity == 32) {\r
- if (ptr->SpecificFlag == 0x06) {\r
+ AddrLen = Ptr->AddrLen;\r
+ Alignment = Ptr->AddrRangeMax;\r
+ if (Ptr->AddrSpaceGranularity == 32) {\r
+ if (Ptr->SpecificFlag == 0x06) {\r
//\r
// Apply from GCD\r
//\r
}\r
}\r
\r
- if (ptr->AddrSpaceGranularity == 64) {\r
- if (ptr->SpecificFlag == 0x06) {\r
+ if (Ptr->AddrSpaceGranularity == 64) {\r
+ if (Ptr->SpecificFlag == 0x06) {\r
RootBridgeInstance->ResAllocNode[TypePMem64].Status = ResSubmitted;\r
} else {\r
RootBridgeInstance->ResAllocNode[TypeMem64].Status = ResSubmitted;\r
break;\r
\r
case 1:\r
- AddrLen = (UINTN)ptr->AddrLen;\r
- Alignment = (UINTN)ptr->AddrRangeMax;\r
+ AddrLen = (UINTN) Ptr->AddrLen;\r
+ Alignment = (UINTN) Ptr->AddrRangeMax;\r
RootBridgeInstance->ResAllocNode[TypeIo].Length = AddrLen;\r
RootBridgeInstance->ResAllocNode[TypeIo].Alignment = Alignment;\r
RootBridgeInstance->ResAllocNode[TypeIo].Status = ResRequested;\r
UINTN Number; \r
VOID *Buffer; \r
UINT8 *Temp;\r
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *ptr;\r
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;\r
UINT64 ResStatus;\r
\r
Buffer = NULL;\r
Temp = Buffer;\r
for (Index = 0; Index < TypeBus; Index ++) {\r
if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {\r
- ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;\r
+ Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;\r
ResStatus = RootBridgeInstance->ResAllocNode[Index].Status;\r
\r
switch (Index) {\r
//\r
// Io\r
//\r
- ptr->Desc = 0x8A;\r
- ptr->Len = 0x2B;\r
- ptr->ResType = 1;\r
- ptr->GenFlag = 0; \r
- ptr->SpecificFlag = 0;\r
- ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;\r
- ptr->AddrRangeMax = 0;\r
- ptr->AddrTranslationOffset = \\r
+ Ptr->Desc = 0x8A;\r
+ Ptr->Len = 0x2B;\r
+ Ptr->ResType = 1;\r
+ Ptr->GenFlag = 0; \r
+ Ptr->SpecificFlag = 0;\r
+ Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;\r
+ Ptr->AddrRangeMax = 0;\r
+ Ptr->AddrTranslationOffset = \\r
(ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;\r
- ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r
+ Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r
break;\r
\r
case TypeMem32:\r
//\r
// Memory 32\r
// \r
- ptr->Desc = 0x8A;\r
- ptr->Len = 0x2B;\r
- ptr->ResType = 0;\r
- ptr->GenFlag = 0; \r
- ptr->SpecificFlag = 0;\r
- ptr->AddrSpaceGranularity = 32;\r
- ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;\r
- ptr->AddrRangeMax = 0;\r
- ptr->AddrTranslationOffset = \\r
+ Ptr->Desc = 0x8A;\r
+ Ptr->Len = 0x2B;\r
+ Ptr->ResType = 0;\r
+ Ptr->GenFlag = 0; \r
+ Ptr->SpecificFlag = 0;\r
+ Ptr->AddrSpaceGranularity = 32;\r
+ Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;\r
+ Ptr->AddrRangeMax = 0;\r
+ Ptr->AddrTranslationOffset = \\r
(ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS; \r
- ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r
+ Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r
break;\r
\r
case TypePMem32:\r
//\r
// Prefetch memory 32\r
//\r
- ptr->Desc = 0x8A;\r
- ptr->Len = 0x2B;\r
- ptr->ResType = 0;\r
- ptr->GenFlag = 0; \r
- ptr->SpecificFlag = 6;\r
- ptr->AddrSpaceGranularity = 32;\r
- ptr->AddrRangeMin = 0;\r
- ptr->AddrRangeMax = 0;\r
- ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT; \r
- ptr->AddrLen = 0;\r
+ Ptr->Desc = 0x8A;\r
+ Ptr->Len = 0x2B;\r
+ Ptr->ResType = 0;\r
+ Ptr->GenFlag = 0; \r
+ Ptr->SpecificFlag = 6;\r
+ Ptr->AddrSpaceGranularity = 32;\r
+ Ptr->AddrRangeMin = 0;\r
+ Ptr->AddrRangeMax = 0;\r
+ Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT; \r
+ Ptr->AddrLen = 0;\r
break;\r
\r
case TypeMem64:\r
//\r
// Memory 64\r
//\r
- ptr->Desc = 0x8A;\r
- ptr->Len = 0x2B;\r
- ptr->ResType = 0;\r
- ptr->GenFlag = 0; \r
- ptr->SpecificFlag = 0;\r
- ptr->AddrSpaceGranularity = 64;\r
- ptr->AddrRangeMin = 0;\r
- ptr->AddrRangeMax = 0;\r
- ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT; \r
- ptr->AddrLen = 0;\r
+ Ptr->Desc = 0x8A;\r
+ Ptr->Len = 0x2B;\r
+ Ptr->ResType = 0;\r
+ Ptr->GenFlag = 0; \r
+ Ptr->SpecificFlag = 0;\r
+ Ptr->AddrSpaceGranularity = 64;\r
+ Ptr->AddrRangeMin = 0;\r
+ Ptr->AddrRangeMax = 0;\r
+ Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT; \r
+ Ptr->AddrLen = 0;\r
break;\r
\r
case TypePMem64:\r
//\r
// Prefetch memory 64\r
//\r
- ptr->Desc = 0x8A;\r
- ptr->Len = 0x2B;\r
- ptr->ResType = 0;\r
- ptr->GenFlag = 0; \r
- ptr->SpecificFlag = 6;\r
- ptr->AddrSpaceGranularity = 64;\r
- ptr->AddrRangeMin = 0;\r
- ptr->AddrRangeMax = 0;\r
- ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT; \r
- ptr->AddrLen = 0;\r
+ Ptr->Desc = 0x8A;\r
+ Ptr->Len = 0x2B;\r
+ Ptr->ResType = 0;\r
+ Ptr->GenFlag = 0; \r
+ Ptr->SpecificFlag = 6;\r
+ Ptr->AddrSpaceGranularity = 64;\r
+ Ptr->AddrRangeMin = 0;\r
+ Ptr->AddrRangeMax = 0;\r
+ Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT; \r
+ Ptr->AddrLen = 0;\r
break;\r
};\r
\r
@param RootBridge Point to PCI root bridge.\r
@param PciAddress The specific device PCI address\r
**/\r
-STATIC\r
VOID\r
UpdateRootBridgeAttributes (\r
IN PCI_ROOT_BRIDGE_INSTANCE *RootBridge,\r
EFI_STATUS\r
EFIAPI\r
PreprocessController (\r
- IN struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
IN EFI_HANDLE RootBridgeHandle,\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r
IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase\r