/** @file\r
Provides the basic interfaces to abstract a PCI Host Bridge Resource Allocation\r
\r
-Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials are\r
licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
//\r
UINTN RootBridgeNumber[1] = { 1 };\r
\r
-UINT64 RootBridgeAttribute[1][1] = { EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM };\r
+UINT64 RootBridgeAttribute[1][1] = { { EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM } };\r
\r
EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {\r
{\r
- ACPI_DEVICE_PATH,\r
- ACPI_DP,\r
- (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),\r
- (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8),\r
- EISA_PNP_ID(0x0A03),\r
- 0,\r
- END_DEVICE_PATH_TYPE,\r
- END_ENTIRE_DEVICE_PATH_SUBTYPE,\r
- END_DEVICE_PATH_LENGTH,\r
- 0\r
+ {\r
+ {\r
+ {\r
+ ACPI_DEVICE_PATH,\r
+ ACPI_DP,\r
+ {\r
+ (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),\r
+ (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)\r
+ }\r
+ },\r
+ EISA_PNP_ID(0x0A03),\r
+ 0\r
+ },\r
+ \r
+ {\r
+ END_DEVICE_PATH_TYPE,\r
+ END_ENTIRE_DEVICE_PATH_SUBTYPE,\r
+ {\r
+ END_DEVICE_PATH_LENGTH,\r
+ 0\r
+ }\r
+ }\r
+ }\r
}\r
};\r
\r
PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[1][1] = {\r
- {0, 0xff, 0x80000000, 0xffffffff, 0, 0xffff}\r
+ {{0, 0xff, 0x80000000, 0xffffffff, 0, 0xffff}}\r
};\r
\r
EFI_HANDLE mDriverImageHandle;\r
} \r
break;\r
\r
+ case EfiPciHostBridgeEndEnumeration:\r
+ break;\r
+\r
case EfiPciHostBridgeBeginBusAllocation:\r
//\r
// No specific action is required here, can perform any chipset specific programing\r
//\r
HostBridgeInstance->CanRestarted = FALSE;\r
- return EFI_SUCCESS;\r
break;\r
\r
case EfiPciHostBridgeEndBusAllocation:\r
// No specific action is required here, can perform any chipset specific programing\r
//\r
//HostBridgeInstance->CanRestarted = FALSE;\r
- return EFI_SUCCESS;\r
break;\r
\r
case EfiPciHostBridgeBeginResourceAllocation:\r
// No specific action is required here, can perform any chipset specific programing\r
//\r
//HostBridgeInstance->CanRestarted = FALSE;\r
- return EFI_SUCCESS;\r
break;\r
\r
case EfiPciHostBridgeAllocateResources:\r
HostBridgeInstance->ResourceSubmited = FALSE;\r
HostBridgeInstance->CanRestarted = TRUE; \r
return ReturnStatus;\r
- break;\r
\r
case EfiPciHostBridgeEndResourceAllocation:\r
HostBridgeInstance->CanRestarted = FALSE;\r
\r
default:\r
return EFI_INVALID_PARAMETER;\r
- }; // end switch\r
+ }\r
\r
return EFI_SUCCESS; \r
}\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
-/**\r
- Update attribute for PCI root bridge for specifc device.\r
-\r
- @param RootBridge Point to PCI root bridge.\r
- @param PciAddress The specific device PCI address\r
-**/\r
-VOID\r
-UpdateRootBridgeAttributes (\r
- IN PCI_ROOT_BRIDGE_INSTANCE *RootBridge,\r
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress\r
- )\r
-{\r
- EFI_STATUS Status;\r
- PCI_TYPE01 PciConfigurationHeader;\r
- UINT64 Attributes;\r
-\r
- //\r
- // Read the PCI Configuration Header for the device\r
- //\r
- Status = RootBridge->Io.Pci.Read (\r
- &RootBridge->Io,\r
- EfiPciWidthUint16,\r
- EFI_PCI_ADDRESS(\r
- PciAddress.Bus,\r
- PciAddress.Device,\r
- PciAddress.Function,\r
- 0\r
- ),\r
- sizeof (PciConfigurationHeader) / sizeof (UINT16),\r
- &PciConfigurationHeader\r
- );\r
- if (EFI_ERROR (Status)) {\r
- return;\r
- }\r
-\r
- Attributes = RootBridge->Attributes;\r
-\r
- //\r
- // Look for devices with the VGA Palette Snoop enabled in the COMMAND register of the PCI Config Header\r
- //\r
- if (PciConfigurationHeader.Hdr.Command & 0x20) {\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;\r
- }\r
-\r
- //\r
- // If the device is a PCI-PCI Bridge, then look at the Subordinate Bus Number\r
- //\r
- if (IS_PCI_BRIDGE(&PciConfigurationHeader)) {\r
- //\r
- // Look at the PPB Configuration for legacy decoding attributes\r
- //\r
- if (PciConfigurationHeader.Bridge.BridgeControl & 0x04) {\r
- Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO;\r
- Attributes |= EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO;\r
- }\r
- if (PciConfigurationHeader.Bridge.BridgeControl & 0x08) {\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO;\r
- }\r
- } else {\r
- //\r
- // See if the PCI device is an IDE controller\r
- //\r
- if (PciConfigurationHeader.Hdr.ClassCode[2] == 0x01 &&\r
- PciConfigurationHeader.Hdr.ClassCode[1] == 0x01 ) {\r
- if (PciConfigurationHeader.Hdr.ClassCode[0] & 0x80) {\r
- Attributes |= EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO;\r
- Attributes |= EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO;\r
- }\r
- if (PciConfigurationHeader.Hdr.ClassCode[0] & 0x01) {\r
- Attributes |= EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO;\r
- }\r
- if (PciConfigurationHeader.Hdr.ClassCode[0] & 0x04) {\r
- Attributes |= EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO;\r
- }\r
- }\r
-\r
- //\r
- // See if the PCI device is a legacy VGA controller\r
- //\r
- if (PciConfigurationHeader.Hdr.ClassCode[2] == 0x00 &&\r
- PciConfigurationHeader.Hdr.ClassCode[1] == 0x01 ) {\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO;\r
- }\r
-\r
- //\r
- // See if the PCI device is a standard VGA controller\r
- //\r
- if (PciConfigurationHeader.Hdr.ClassCode[2] == 0x03 &&\r
- PciConfigurationHeader.Hdr.ClassCode[1] == 0x00 ) {\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO;\r
- }\r
- }\r
-\r
- RootBridge->Attributes = Attributes;\r
- RootBridge->Supports = Attributes;\r
-}\r
-\r
/**\r
Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various\r
stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual\r
while (List != &HostBridgeInstance->Head) {\r
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
if (RootBridgeHandle == RootBridgeInstance->Handle) {\r
- UpdateRootBridgeAttributes (\r
- RootBridgeInstance,\r
- PciAddress\r
- );\r
- return EFI_SUCCESS;\r
+ break;\r
}\r
List = List->ForwardLink;\r
}\r
+ if (List == &HostBridgeInstance->Head) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
\r
- return EFI_INVALID_PARAMETER;\r
+ if ((UINT32)Phase > EfiPciBeforeResourceCollection) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ return EFI_SUCCESS;\r
}\r
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