PcAtChipsetPkg/PciHostBridgeDxe: Improve KVM FIFO I/O read/write performance

[mirror_edk2.git] / PcAtChipsetPkg / PciHostBridgeDxe / PciRootBridgeIo.c

diff --git a/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c b/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c
index cd39f2bbf71e421d05445f20dbe39246a88b5e28..b4da52eefe076899eb46dc440d47570378900f16 100644 (file)
--- a/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c
+++ b/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c
@@ -13,6 +13,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 **/ \r
 \r
 #include "PciHostBridge.h"\r
+#include "IoFifo.h"\r
 \r
 typedef struct {\r
   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR     SpaceDesp[TypeMax];\r
@@ -674,8 +675,11 @@ RootBridgeConstructor (
 \r
   PrivateData->RootBridgeAttrib = Attri;\r
   \r
-  PrivateData->Attributes  = 0;\r
-  PrivateData->Supports    = 0;\r
+  PrivateData->Supports    = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO | EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO | \\r
+                             EFI_PCI_ATTRIBUTE_ISA_IO_16 | EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO | \\r
+                             EFI_PCI_ATTRIBUTE_VGA_MEMORY | \\r
+                             EFI_PCI_ATTRIBUTE_VGA_IO_16  | EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;\r
+  PrivateData->Attributes  = PrivateData->Supports;\r
 \r
   Protocol->ParentHandle   = HostBridgeHandle;\r
   \r
@@ -991,6 +995,51 @@ RootBridgeIoIoRW (
   InStride = mInStride[Width];\r
   OutStride = mOutStride[Width];\r
   OperationWidth = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) (Width & 0x03);\r
+\r
+#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r
+  if (InStride == 0) {\r
+    if (Write) {\r
+      switch (OperationWidth) {\r
+        case EfiPciWidthUint8:\r
+          IoWriteFifo8 ((UINTN) Address, Count, Buffer);\r
+          return EFI_SUCCESS;\r
+        case EfiPciWidthUint16:\r
+          IoWriteFifo16 ((UINTN) Address, Count, Buffer);\r
+          return EFI_SUCCESS;\r
+        case EfiPciWidthUint32:\r
+          IoWriteFifo32 ((UINTN) Address, Count, Buffer);\r
+          return EFI_SUCCESS;\r
+        default:\r
+          //\r
+          // The RootBridgeIoCheckParameter call above will ensure that this\r
+          // path is not taken.\r
+          //\r
+          ASSERT (FALSE);\r
+          break;\r
+      }\r
+    } else {\r
+      switch (OperationWidth) {\r
+        case EfiPciWidthUint8:\r
+          IoReadFifo8 ((UINTN) Address, Count, Buffer);\r
+          return EFI_SUCCESS;\r
+        case EfiPciWidthUint16:\r
+          IoReadFifo16 ((UINTN) Address, Count, Buffer);\r
+          return EFI_SUCCESS;\r
+        case EfiPciWidthUint32:\r
+          IoReadFifo32 ((UINTN) Address, Count, Buffer);\r
+          return EFI_SUCCESS;\r
+        default:\r
+          //\r
+          // The RootBridgeIoCheckParameter call above will ensure that this\r
+          // path is not taken.\r
+          //\r
+          ASSERT (FALSE);\r
+          break;\r
+      }\r
+    }\r
+  }\r
+#endif\r
+\r
   for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {\r
     if (Write) {\r
       switch (OperationWidth) {\r