/** @file\r
Implementation of helper routines for DXE environment.\r
\r
-Copyright (c) 2013 Intel Corporation.\r
+Copyright (c) 2013 - 2016 Intel Corporation.\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
#include <Library/S3BootScriptLib.h>\r
#include <Library/DxeServicesLib.h>\r
#include <Library/UefiRuntimeServicesTableLib.h>\r
-#include <Library/I2cLib.h>\r
#include <Protocol/SmmBase2.h>\r
#include <Protocol/Spi.h>\r
#include <Protocol/VariableLock.h>\r
// Routines shared with other souce modules in this component.\r
//\r
\r
-BOOLEAN\r
-Pcal9555GetPortRegBit (\r
- IN CONST UINT32 Pcal9555SlaveAddr,\r
- IN CONST UINT32 GpioNum,\r
- IN CONST UINT8 RegBase\r
- )\r
-{\r
- EFI_STATUS Status;\r
- UINTN ReadLength;\r
- UINTN WriteLength;\r
- UINT8 Data[2];\r
- EFI_I2C_DEVICE_ADDRESS I2cDeviceAddr;\r
- EFI_I2C_ADDR_MODE I2cAddrMode;\r
- UINT8 *RegValuePtr;\r
- UINT8 GpioNumMask;\r
- UINT8 SubAddr;\r
-\r
- I2cDeviceAddr.I2CDeviceAddress = (UINTN) Pcal9555SlaveAddr;\r
- I2cAddrMode = EfiI2CSevenBitAddrMode;\r
-\r
- if (GpioNum < 8) {\r
- SubAddr = RegBase;\r
- GpioNumMask = (UINT8) (1 << GpioNum);\r
- } else {\r
- SubAddr = RegBase + 1;\r
- GpioNumMask = (UINT8) (1 << (GpioNum - 8));\r
- }\r
-\r
- //\r
- // Output port value always at 2nd byte in Data variable.\r
- //\r
- RegValuePtr = &Data[1];\r
-\r
- //\r
- // On read entry sub address at 2nd byte, on read exit output\r
- // port value in 2nd byte.\r
- //\r
- Data[1] = SubAddr;\r
- WriteLength = 1;\r
- ReadLength = 1;\r
- Status = I2cReadMultipleByte (\r
- I2cDeviceAddr,\r
- I2cAddrMode,\r
- &WriteLength,\r
- &ReadLength,\r
- &Data[1]\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- //\r
- // Adjust output port bit given callers request.\r
- //\r
- return ((*RegValuePtr & GpioNumMask) != 0);\r
-}\r
-\r
-VOID\r
-Pcal9555SetPortRegBit (\r
- IN CONST UINT32 Pcal9555SlaveAddr,\r
- IN CONST UINT32 GpioNum,\r
- IN CONST UINT8 RegBase,\r
- IN CONST BOOLEAN LogicOne\r
- )\r
-{\r
- EFI_STATUS Status;\r
- UINTN ReadLength;\r
- UINTN WriteLength;\r
- UINT8 Data[2];\r
- EFI_I2C_DEVICE_ADDRESS I2cDeviceAddr;\r
- EFI_I2C_ADDR_MODE I2cAddrMode;\r
- UINT8 *RegValuePtr;\r
- UINT8 GpioNumMask;\r
- UINT8 SubAddr;\r
-\r
- I2cDeviceAddr.I2CDeviceAddress = (UINTN) Pcal9555SlaveAddr;\r
- I2cAddrMode = EfiI2CSevenBitAddrMode;\r
-\r
- if (GpioNum < 8) {\r
- SubAddr = RegBase;\r
- GpioNumMask = (UINT8) (1 << GpioNum);\r
- } else {\r
- SubAddr = RegBase + 1;\r
- GpioNumMask = (UINT8) (1 << (GpioNum - 8));\r
- }\r
-\r
- //\r
- // Output port value always at 2nd byte in Data variable.\r
- //\r
- RegValuePtr = &Data[1];\r
-\r
- //\r
- // On read entry sub address at 2nd byte, on read exit output\r
- // port value in 2nd byte.\r
- //\r
- Data[1] = SubAddr;\r
- WriteLength = 1;\r
- ReadLength = 1;\r
- Status = I2cReadMultipleByte (\r
- I2cDeviceAddr,\r
- I2cAddrMode,\r
- &WriteLength,\r
- &ReadLength,\r
- &Data[1]\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- //\r
- // Adjust output port bit given callers request.\r
- //\r
- if (LogicOne) {\r
- *RegValuePtr = *RegValuePtr | GpioNumMask;\r
- } else {\r
- *RegValuePtr = *RegValuePtr & ~(GpioNumMask);\r
- }\r
-\r
- //\r
- // Update register. Sub address at 1st byte, value at 2nd byte.\r
- //\r
- WriteLength = 2;\r
- Data[0] = SubAddr;\r
- Status = I2cWriteMultipleByte (\r
- I2cDeviceAddr,\r
- I2cAddrMode,\r
- &WriteLength,\r
- Data\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
-}\r
-\r
-\r
EFI_SPI_PROTOCOL *\r
LocateSpiProtocol (\r
IN EFI_SMM_SYSTEM_TABLE2 *Smst\r
//\r
\r
SpiProtocol = LocateSpiProtocol (NULL); // This routine will not be called in SMM.\r
- ASSERT_EFI_ERROR (SpiProtocol != NULL);\r
+ ASSERT (SpiProtocol != NULL);\r
if (SpiProtocol != NULL) {\r
Status = SpiProtocol->Lock (SpiProtocol);\r
\r
}\r
}\r
\r
-/**\r
- Erase and Write to platform flash.\r
-\r
- Routine accesses one flash block at a time, each access consists\r
- of an erase followed by a write of FLASH_BLOCK_SIZE. One or both\r
- of DoErase & DoWrite params must be TRUE.\r
-\r
- Limitations:-\r
- CpuWriteAddress must be aligned to FLASH_BLOCK_SIZE.\r
- DataSize must be a multiple of FLASH_BLOCK_SIZE.\r
-\r
- @param Smst If != NULL then InSmm and use to locate\r
- SpiProtocol.\r
- @param CpuWriteAddress Address in CPU memory map of flash region.\r
- @param Data The buffer containing the data to be written.\r
- @param DataSize Amount of data to write.\r
- @param DoErase Earse each block.\r
- @param DoWrite Write to each block.\r
-\r
- @retval EFI_SUCCESS Operation successful.\r
- @retval EFI_NOT_READY Required resources not setup.\r
- @retval EFI_INVALID_PARAMETER Invalid parameter.\r
- @retval Others Unexpected error happened.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-PlatformFlashEraseWrite (\r
- IN VOID *Smst,\r
- IN UINTN CpuWriteAddress,\r
- IN UINT8 *Data,\r
- IN UINTN DataSize,\r
- IN BOOLEAN DoErase,\r
- IN BOOLEAN DoWrite\r
- )\r
-{\r
- EFI_STATUS Status;\r
- UINT64 CpuBaseAddress;\r
- SPI_INIT_INFO *SpiInfo;\r
- UINT8 *WriteBuf;\r
- UINTN Index;\r
- UINTN SpiWriteAddress;\r
- EFI_SPI_PROTOCOL *SpiProtocol;\r
-\r
- if (!DoErase && !DoWrite) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
- if (DoWrite && Data == NULL) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
- if ((CpuWriteAddress % FLASH_BLOCK_SIZE) != 0) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
- if ((DataSize % FLASH_BLOCK_SIZE) != 0) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
- SpiProtocol = LocateSpiProtocol ((EFI_SMM_SYSTEM_TABLE2 *)Smst);\r
- if (SpiProtocol == NULL) {\r
- return EFI_NOT_READY;\r
- }\r
-\r
- //\r
- // Find info to allow usage of SpiProtocol->Execute.\r
- //\r
- Status = SpiProtocol->Info (\r
- SpiProtocol,\r
- &SpiInfo\r
- );\r
- if (EFI_ERROR(Status)) {\r
- return Status;\r
- }\r
- ASSERT (SpiInfo->InitTable != NULL);\r
- ASSERT (SpiInfo->EraseOpcodeIndex < SPI_NUM_OPCODE);\r
- ASSERT (SpiInfo->ProgramOpcodeIndex < SPI_NUM_OPCODE);\r
-\r
- CpuBaseAddress = PcdGet32 (PcdFlashAreaBaseAddress) - (UINT32)SpiInfo->InitTable->BiosStartOffset;\r
- ASSERT(CpuBaseAddress >= (SIZE_4GB - SIZE_8MB));\r
- if (CpuWriteAddress < CpuBaseAddress) {\r
- return (EFI_INVALID_PARAMETER);\r
- }\r
-\r
- SpiWriteAddress = CpuWriteAddress - ((UINTN) CpuBaseAddress);\r
- WriteBuf = Data;\r
- DEBUG (\r
- (EFI_D_INFO, "PlatformFlashWrite:SpiWriteAddress=%08x EraseIndex=%d WriteIndex=%d\n",\r
- SpiWriteAddress,\r
- (UINTN) SpiInfo->EraseOpcodeIndex,\r
- (UINTN) SpiInfo->ProgramOpcodeIndex\r
- ));\r
- for (Index =0; Index < DataSize / FLASH_BLOCK_SIZE; Index++) {\r
- if (DoErase) {\r
- DEBUG (\r
- (EFI_D_INFO, "PlatformFlashWrite:Erase[%04x] SpiWriteAddress=%08x\n",\r
- Index,\r
- SpiWriteAddress\r
- ));\r
- Status = SpiProtocol->Execute (\r
- SpiProtocol,\r
- SpiInfo->EraseOpcodeIndex,// OpcodeIndex\r
- 0, // PrefixOpcodeIndex\r
- FALSE, // DataCycle\r
- TRUE, // Atomic\r
- FALSE, // ShiftOut\r
- SpiWriteAddress, // Address\r
- 0, // Data Number\r
- NULL,\r
- EnumSpiRegionAll // SPI_REGION_TYPE\r
- );\r
- if (EFI_ERROR(Status)) {\r
- return Status;\r
- }\r
- }\r
-\r
- if (DoWrite) {\r
- DEBUG (\r
- (EFI_D_INFO, "PlatformFlashWrite:Write[%04x] SpiWriteAddress=%08x\n",\r
- Index,\r
- SpiWriteAddress\r
- ));\r
- Status = SpiProtocol->Execute (\r
- SpiProtocol,\r
- SpiInfo->ProgramOpcodeIndex, // OpcodeIndex\r
- 0, // PrefixOpcodeIndex\r
- TRUE, // DataCycle\r
- TRUE, // Atomic\r
- TRUE, // ShiftOut\r
- SpiWriteAddress, // Address\r
- FLASH_BLOCK_SIZE, // Data Number\r
- WriteBuf,\r
- EnumSpiRegionAll\r
- );\r
- if (EFI_ERROR(Status)) {\r
- return Status;\r
- }\r
- WriteBuf+=FLASH_BLOCK_SIZE;\r
- }\r
- SpiWriteAddress+=FLASH_BLOCK_SIZE;\r
- }\r
- return EFI_SUCCESS;\r
-}\r
-\r
/** Check if System booted with recovery Boot Stage1 image.\r
\r
@retval TRUE If system booted with recovery Boot Stage1 image.\r
return FALSE;\r
}\r
\r
-/**\r
- Set the direction of Pcal9555 IO Expander GPIO pin.\r
-\r
- @param Pcal9555SlaveAddr I2c Slave address of Pcal9555 Io Expander.\r
- @param GpioNum Gpio direction to configure - values 0-7 for Port0\r
- and 8-15 for Port1.\r
- @param CfgAsInput If TRUE set pin direction as input else set as output.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-PlatformPcal9555GpioSetDir (\r
- IN CONST UINT32 Pcal9555SlaveAddr,\r
- IN CONST UINT32 GpioNum,\r
- IN CONST BOOLEAN CfgAsInput\r
- )\r
-{\r
- Pcal9555SetPortRegBit (\r
- Pcal9555SlaveAddr,\r
- GpioNum,\r
- PCAL9555_REG_CFG_PORT0,\r
- CfgAsInput\r
- );\r
-}\r
-\r
-/**\r
- Set the level of Pcal9555 IO Expander GPIO high or low.\r
-\r
- @param Pcal9555SlaveAddr I2c Slave address of Pcal9555 Io Expander.\r
- @param GpioNum Gpio to change values 0-7 for Port0 and 8-15\r
- for Port1.\r
- @param HighLevel If TRUE set pin high else set pin low.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-PlatformPcal9555GpioSetLevel (\r
- IN CONST UINT32 Pcal9555SlaveAddr,\r
- IN CONST UINT32 GpioNum,\r
- IN CONST BOOLEAN HighLevel\r
- )\r
-{\r
- Pcal9555SetPortRegBit (\r
- Pcal9555SlaveAddr,\r
- GpioNum,\r
- PCAL9555_REG_OUT_PORT0,\r
- HighLevel\r
- );\r
-}\r
-\r
-/**\r
-\r
- Enable pull-up/pull-down resistors of Pcal9555 GPIOs.\r
-\r
- @param Pcal9555SlaveAddr I2c Slave address of Pcal9555 Io Expander.\r
- @param GpioNum Gpio to change values 0-7 for Port0 and 8-15\r
- for Port1.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-PlatformPcal9555GpioEnablePull (\r
- IN CONST UINT32 Pcal9555SlaveAddr,\r
- IN CONST UINT32 GpioNum\r
- )\r
-{\r
- Pcal9555SetPortRegBit (\r
- Pcal9555SlaveAddr,\r
- GpioNum,\r
- PCAL9555_REG_PULL_EN_PORT0,\r
- TRUE\r
- );\r
-}\r
-\r
-/**\r
-\r
- Disable pull-up/pull-down resistors of Pcal9555 GPIOs.\r
-\r
- @param Pcal9555SlaveAddr I2c Slave address of Pcal9555 Io Expander.\r
- @param GpioNum Gpio to change values 0-7 for Port0 and 8-15\r
- for Port1.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-PlatformPcal9555GpioDisablePull (\r
- IN CONST UINT32 Pcal9555SlaveAddr,\r
- IN CONST UINT32 GpioNum\r
- )\r
-{\r
- Pcal9555SetPortRegBit (\r
- Pcal9555SlaveAddr,\r
- GpioNum,\r
- PCAL9555_REG_PULL_EN_PORT0,\r
- FALSE\r
- );\r
-}\r
-\r
-/**\r
-\r
- Get state of Pcal9555 GPIOs.\r
-\r
- @param Pcal9555SlaveAddr I2c Slave address of Pcal9555 Io Expander.\r
- @param GpioNum Gpio to change values 0-7 for Port0 and 8-15\r
- for Port1.\r
-\r
- @retval TRUE GPIO pin is high\r
- @retval FALSE GPIO pin is low\r
-**/\r
-BOOLEAN\r
-EFIAPI\r
-PlatformPcal9555GpioGetState (\r
- IN CONST UINT32 Pcal9555SlaveAddr,\r
- IN CONST UINT32 GpioNum\r
- )\r
-{\r
- return Pcal9555GetPortRegBit (Pcal9555SlaveAddr, GpioNum, PCAL9555_REG_IN_PORT0);\r
-}\r
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