QuarkSocPkg: Add new package for Quark SoC X1000

[mirror_edk2.git] / QuarkSocPkg / QuarkNorthCluster / Smm / DxeSmm / QncSmmDispatcher / QNC / QNCSmmSw.c

diff --git a/QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNC/QNCSmmSw.c b/QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNC/QNCSmmSw.c
new file mode 100644 (file)
index 0000000..b4f56e8
--- /dev/null
+++ b/QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNC/QNCSmmSw.c
@@ -0,0 +1,96 @@
+/** @file\r
+File to contain all the hardware specific stuff for the Smm Sw dispatch protocol.\r
+\r
+Copyright (c) 2013-2015 Intel Corporation.\r
+\r
+This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution.  The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "QNCSmmHelpers.h"\r
+\r
+EFI_SMM_CPU_PROTOCOL  *mSmmCpu = NULL;\r
+\r
+CONST QNC_SMM_SOURCE_DESC SW_SOURCE_DESC = {\r
+  QNC_SMM_NO_FLAGS,\r
+  {\r
+    {\r
+      {GPE_ADDR_TYPE, {R_QNC_GPE0BLK_SMIE}}, S_QNC_GPE0BLK_SMIE, N_QNC_GPE0BLK_SMIE_APM\r
+    },\r
+    NULL_BIT_DESC_INITIALIZER\r
+  },\r
+  {\r
+    {\r
+      {GPE_ADDR_TYPE, {R_QNC_GPE0BLK_SMIS}}, S_QNC_GPE0BLK_SMIS, N_QNC_GPE0BLK_SMIS_APM\r
+    }\r
+  }\r
+};\r
+\r
+VOID\r
+SwGetContext(\r
+  IN  DATABASE_RECORD    *Record,\r
+  OUT QNC_SMM_CONTEXT    *Context\r
+  )\r
+{\r
+  Context->Sw.SwSmiInputValue = IoRead8 (R_APM_CNT);\r
+}\r
+\r
+BOOLEAN\r
+SwCmpContext (\r
+  IN QNC_SMM_CONTEXT     *Context1,\r
+  IN QNC_SMM_CONTEXT     *Context2\r
+  )\r
+{\r
+  return (BOOLEAN)( Context1->Sw.SwSmiInputValue == Context2->Sw.SwSmiInputValue );\r
+}\r
+\r
+VOID\r
+SwGetBuffer (\r
+  IN  DATABASE_RECORD     * Record\r
+  )\r
+{\r
+  EFI_STATUS                 Status;\r
+  UINTN                      Index;\r
+  UINTN                      CpuIndex;\r
+  EFI_SMM_SAVE_STATE_IO_INFO IoState;\r
+\r
+  //\r
+  // Locate SMM CPU protocol to retrieve the CPU save state\r
+  //\r
+  if (mSmmCpu == NULL) {\r
+    Status = gSmst->SmmLocateProtocol (&gEfiSmmCpuProtocolGuid, NULL, (VOID **) &mSmmCpu);\r
+    ASSERT_EFI_ERROR (Status);\r
+  }\r
+\r
+  //\r
+  // Find the CPU which generated the software SMI\r
+  //\r
+  CpuIndex = 0;\r
+  for (Index = 0; Index < gSmst->NumberOfCpus; Index++) {\r
+    Status = mSmmCpu->ReadSaveState (\r
+                        mSmmCpu,\r
+                        sizeof (EFI_SMM_SAVE_STATE_IO_INFO),\r
+                        EFI_SMM_SAVE_STATE_REGISTER_IO,\r
+                        Index,\r
+                        &IoState\r
+                        );\r
+    if (!EFI_ERROR (Status) && (IoState.IoPort == R_APM_CNT)) {\r
+      CpuIndex = Index;\r
+      break;\r
+    }\r
+  }\r
+\r
+  Record->CommBuffer.Sw.SwSmiCpuIndex = CpuIndex;\r
+}\r