--- /dev/null
+## @file\r
+# Component description file for QuarkNcSocId SmmDispatcher module.\r
+#\r
+# This driver is responsible for the registration of child drivers\r
+# and the abstraction of the ICH SMI sources.\r
+# Copyright (c) 2013-2015 Intel Corporation.\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+##\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = QNCSmmDispatcher\r
+ FILE_GUID = 2480271C-09C6-4f36-AD75-5E1390BD9929\r
+ MODULE_TYPE = DXE_SMM_DRIVER\r
+ VERSION_STRING = 1.0\r
+ PI_SPECIFICATION_VERSION = 0x0001000A\r
+ ENTRY_POINT = InitializeQNCSmmDispatcher\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+#\r
+\r
+[Sources]\r
+ QNC/QNCSmmPeriodicTimer.c\r
+ QNC/QNCSmmQncn.c\r
+ QNC/QNCSmmSx.c\r
+ QNC/QNCSmmSw.c\r
+ QNC/QNCSmmGpi.c\r
+ QNC/QNCSmmHelpers.c\r
+ QNCSmmHelpers.c\r
+ QNCSmmCore.c\r
+ QNCSmmHelpers.h\r
+ QNCxSmmHelpers.h\r
+ QNCSmmRegisters.h\r
+ QNCSmm.h\r
+ CommonHeader.h\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ QuarkSocPkg/QuarkSocPkg.dec\r
+ MdeModulePkg/MdeModulePkg.dec\r
+ IntelFrameworkPkg/IntelFrameworkPkg.dec\r
+\r
+[LibraryClasses]\r
+ UefiDriverEntryPoint\r
+ SmmServicesTableLib\r
+ UefiBootServicesTableLib\r
+ DxeServicesTableLib\r
+ MemoryAllocationLib\r
+ PciLib\r
+ PcdLib\r
+ BaseMemoryLib\r
+ DebugLib\r
+ BaseLib\r
+ IoLib\r
+ DevicePathLib\r
+ S3IoLib\r
+ QNCAccessLib\r
+\r
+[Protocols]\r
+ gEfiSmmCpuProtocolGuid # PROTOCOL ALWAYS_CONSUMED\r
+ gEfiSmmReadyToLockProtocolGuid # PROTOCOL ALWAYS_CONSUMED\r
+ gEfiSmmPeriodicTimerDispatch2ProtocolGuid # PROTOCOL ALWAYS_PRODUCED\r
+ gEfiSmmPowerButtonDispatch2ProtocolGuid # PROTOCOL ALWAYS_PRODUCED\r
+ gEfiSmmIchnDispatch2ProtocolGuid # PROTOCOL ALWAYS_PRODUCED\r
+ gEfiSmmGpiDispatch2ProtocolGuid # PROTOCOL ALWAYS_PRODUCED\r
+ gEfiSmmSwDispatch2ProtocolGuid # PROTOCOL ALWAYS_PRODUCED\r
+ gEfiSmmSxDispatch2ProtocolGuid # PROTOCOL ALWAYS_PRODUCED\r
+ gEfiSmmUsbDispatch2ProtocolGuid # PROTOCOL ALWAYS_PRODUCED\r
+ gEfiSmmIoTrapDispatch2ProtocolGuid # PROTOCOL ALWAYS_PRODUCED\r
+\r
+[Pcd]\r
+ gEfiQuarkNcSocIdTokenSpaceGuid.PcdPm1blkIoBaseAddress\r
+ gEfiQuarkNcSocIdTokenSpaceGuid.PcdGpe0blkIoBaseAddress\r
+\r
+[Depex]\r
+ gEfiSmmCpuProtocolGuid AND gEfiPciRootBridgeIoProtocolGuid\r