QuarkSocPkg: Add new package for Quark SoC X1000

[mirror_edk2.git] / QuarkSocPkg / QuarkSouthCluster / Include / CEATA.h

diff --git a/QuarkSocPkg/QuarkSouthCluster/Include/CEATA.h b/QuarkSocPkg/QuarkSouthCluster/Include/CEATA.h
new file mode 100644 (file)
index 0000000..741e7dd
--- /dev/null
+++ b/QuarkSocPkg/QuarkSouthCluster/Include/CEATA.h
@@ -0,0 +1,120 @@
+/** @file\r
+\r
+Header file for chipset CE-AT spec.\r
+\r
+Copyright (c) 2013-2015 Intel Corporation.\r
+\r
+This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution.  The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef _CE_ATA_H\r
+#define _CE_ATA_H\r
+\r
+#pragma pack(1)\r
+\r
+\r
+#define  DATA_UNIT_SIZE       512\r
+\r
+\r
+#define  CMD60                60\r
+#define  CMD61                61\r
+\r
+\r
+#define RW_MULTIPLE_REGISTER  CMD60\r
+#define RW_MULTIPLE_BLOCK     CMD61\r
+\r
+\r
+#define CE_ATA_SIG_CE         0xCE\r
+#define CE_ATA_SIG_AA         0xAA\r
+\r
+\r
+#define Reg_Features_Exp      01\r
+#define Reg_SectorCount_Exp   02\r
+#define Reg_LBALow_Exp        03\r
+#define Reg_LBAMid_Exp        04\r
+#define Reg_LBAHigh_Exp       05\r
+#define Reg_Control           06\r
+#define Reg_Features_Error    09\r
+#define Reg_SectorCount       10\r
+#define Reg_LBALow            11\r
+#define Reg_LBAMid            12\r
+#define Reg_LBAHigh           13\r
+#define Reg_Device_Head       14\r
+#define Reg_Command_Status    15\r
+\r
+#define Reg_scrTempC          0x80\r
+#define Reg_scrTempMaxP       0x84\r
+#define Reg_scrTempMinP       0x88\r
+#define Reg_scrStatus         0x8C\r
+#define Reg_scrReallocsA      0x90\r
+#define Reg_scrERetractsA     0x94\r
+#define Reg_scrCapabilities   0x98\r
+#define Reg_scrControl        0xC0\r
+\r
+\r
+\r
+typedef struct {\r
+  UINT8  Reserved0;\r
+  UINT8  Features_Exp;\r
+  UINT8  SectorCount_Exp;\r
+  UINT8  LBALow_Exp;\r
+  UINT8  LBAMid_Exp;\r
+  UINT8  LBAHigh_Exp;\r
+  UINT8  Control;\r
+  UINT8  Reserved1[2];\r
+  UINT8  Features_Error;\r
+  UINT8  SectorCount;\r
+  UINT8  LBALow;\r
+  UINT8  LBAMid;\r
+  UINT8  LBAHigh;\r
+  UINT8  Device_Head;\r
+  UINT8  Command_Status;\r
+}TASK_FILE;\r
+\r
+\r
+//\r
+//Reduced ATA command set\r
+//\r
+#define IDENTIFY_DEVICE       0xEC\r
+#define READ_DMA_EXT          0x25\r
+#define WRITE_DMA_EXT         0x35\r
+#define STANDBY_IMMEDIATE     0xE0\r
+#define FLUSH_CACHE_EXT       0xEA\r
+\r
+\r
+\r
+typedef struct {\r
+  UINT16  Reserved0[10];\r
+  UINT16  SerialNumber[10];\r
+  UINT16  Reserved1[3];\r
+  UINT16  FirmwareRevision[4];\r
+  UINT16  ModelNumber[20];\r
+  UINT16  Reserved2[33];\r
+  UINT16  MajorVersion;\r
+  UINT16  Reserved3[19];\r
+  UINT16  MaximumLBA[4];\r
+  UINT16  Reserved4[2];\r
+  UINT16  Sectorsize;\r
+  UINT16  Reserved5;\r
+  UINT16  DeviceGUID[4];\r
+  UINT16  Reserved6[94];\r
+  UINT16  Features;\r
+  UINT16  MaxWritesPerAddress;\r
+  UINT16  Reserved7[47];\r
+  UINT16  IntegrityWord;\r
+}IDENTIFY_DEVICE_DATA;\r
+\r
+\r
+\r
+\r
+\r
+#pragma pack()\r
+\r
+#endif\r