return (BOOLEAN)(RegRead != (UINT8)-1);\r
}\r
\r
+/**\r
+ Return PTP interface type.\r
+\r
+ @param[in] Register Pointer to PTP register.\r
+\r
+ @return PTP interface type.\r
+**/\r
+PTP_INTERFACE_TYPE\r
+Tpm12GetPtpInterface (\r
+ IN VOID *Register\r
+ )\r
+{\r
+ PTP_CRB_INTERFACE_IDENTIFIER InterfaceId;\r
+ PTP_FIFO_INTERFACE_CAPABILITY InterfaceCapability;\r
+\r
+ if (!Tpm12TisPcPresenceCheck (Register)) {\r
+ return PtpInterfaceMax;\r
+ }\r
+ //\r
+ // Check interface id\r
+ //\r
+ InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);\r
+ InterfaceCapability.Uint32 = MmioRead32 ((UINTN)&((PTP_FIFO_REGISTERS *)Register)->InterfaceCapability);\r
+\r
+ if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB) &&\r
+ (InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_CRB) &&\r
+ (InterfaceId.Bits.CapCRB != 0)) {\r
+ return PtpInterfaceCrb;\r
+ }\r
+ if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO) &&\r
+ (InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_FIFO) &&\r
+ (InterfaceId.Bits.CapFIFO != 0) &&\r
+ (InterfaceCapability.Bits.InterfaceVersion == INTERFACE_CAPABILITY_INTERFACE_VERSION_PTP)) {\r
+ return PtpInterfaceFifo;\r
+ }\r
+ return PtpInterfaceTis;\r
+}\r
+\r
/**\r
Check whether the value of a TPM chip register satisfies the input BIT setting.\r
\r
IN UINT8 *OutputParameterBlock\r
)\r
{\r
- return Tpm12TisTpmCommand (\r
- (TIS_PC_REGISTERS_PTR) (UINTN) PcdGet64 (PcdTpmBaseAddress),\r
- InputParameterBlock,\r
- InputParameterBlockSize,\r
- OutputParameterBlock,\r
- OutputParameterBlockSize\r
- );\r
-}\r
-\r
-/**\r
- Return PTP interface type.\r
-\r
- @param[in] Register Pointer to PTP register.\r
-\r
- @return PTP interface type.\r
-**/\r
-PTP_INTERFACE_TYPE\r
-Tpm12GetPtpInterface (\r
- IN VOID *Register\r
- )\r
-{\r
- PTP_CRB_INTERFACE_IDENTIFIER InterfaceId;\r
- PTP_FIFO_INTERFACE_CAPABILITY InterfaceCapability;\r
+ PTP_INTERFACE_TYPE PtpInterface;\r
\r
- if (!Tpm12TisPcPresenceCheck (Register)) {\r
- return PtpInterfaceMax;\r
- }\r
//\r
- // Check interface id\r
+ // Special handle for TPM1.2 to check PTP too, because PTP/TIS share same register address.\r
//\r
- InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);\r
- InterfaceCapability.Uint32 = MmioRead32 ((UINTN)&((PTP_FIFO_REGISTERS *)Register)->InterfaceCapability);\r
-\r
- if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB) &&\r
- (InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_CRB) &&\r
- (InterfaceId.Bits.CapCRB != 0)) {\r
- return PtpInterfaceCrb;\r
- }\r
- if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO) &&\r
- (InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_FIFO) &&\r
- (InterfaceId.Bits.CapFIFO != 0) &&\r
- (InterfaceCapability.Bits.InterfaceVersion == INTERFACE_CAPABILITY_INTERFACE_VERSION_PTP)) {\r
- return PtpInterfaceFifo;\r
+ PtpInterface = Tpm12GetPtpInterface ((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));\r
+ switch (PtpInterface) {\r
+ case PtpInterfaceFifo:\r
+ case PtpInterfaceTis:\r
+ return Tpm12TisTpmCommand (\r
+ (TIS_PC_REGISTERS_PTR) (UINTN) PcdGet64 (PcdTpmBaseAddress),\r
+ InputParameterBlock,\r
+ InputParameterBlockSize,\r
+ OutputParameterBlock,\r
+ OutputParameterBlockSize\r
+ );\r
+ case PtpInterfaceCrb:\r
+ //\r
+ // No need to support CRB because it is only accept TPM2 command.\r
+ //\r
+ default:\r
+ return EFI_DEVICE_ERROR;\r
}\r
- return PtpInterfaceTis;\r
+\r
}\r
\r
/**\r